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DRV870XD-Q1 Datasheet(PDF) 5 Page - Texas Instruments |
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DRV870XD-Q1 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 66 page 5 DRV8702D-Q1, DRV8703D-Q1 www.ti.com SLVSDX8 – MARCH 2017 Product Folder Links: DRV8702D-Q1 DRV8703D-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Power supply voltage VM –0.3 47 V Charge pump voltage VCP, CPH –0.3 VVM + 12 V Charge pump negative switching pin CPL –0.3 VVM V Internal logic regulator voltage DVDD –0.3 3.8 V Internal analog regulator voltage AVDD –0.3 5.75 V Drain pin voltage VDRAIN –0.3 47 V Voltage difference between supply and VDRAIN VM – VDRAIN –10 10 V Control pin voltage IN1, IN2, nSLEEP, nFAULT, VREF, IDRIVE, VVDS, MODE, nSCS, SCLK, SDI, SDO, nWDFLT –0.3 5.75 V High-side gate pin voltage GH –0.3 VVM + 12 V Low-side gate pin voltage GL –0.3 12 V Continuous phase-node pin voltage SH –1.2 VVM + 1.2 V Pulsed 10-µs phase-node pin voltage SH –2 VVM + 2 V Continuous shunt amplifier input pin voltage SP –0.5 1 V SN –0.3 0.3 V Pulsed 10-µs shunt amplifier input pin voltage SP –1 1 V Shunt amplifier output pin voltage SO –0.3 5.75 V Shunt amplifier output pin current SO 0 5 mA Maximum current, limit current with external series resistor VDRAIN –2 2 mA Open-drain output current nFAULT, SDO, nWDFLT 0 10 mA Gate pin source current GH, GL 0 250 mA Gate pin sink current GH, GL 0 500 mA Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-011 All pins ±500 Corner pins (1, 8, 9, 16, 17, 24, 25, and 32) ±750 |
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