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PC87311AVF Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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PC87311AVF Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 78 page List of Tables TABLE 2-1 Default Configurations Controlled by Hardware 13 TABLE 2-2 Index and Data Register Optional Locations 14 TABLE 2-3 Primary and Secondary Drive Address Selection 15 TABLE 2-4 Encoded Drive and Motor Pin Information 15 TABLE 2-5 Parallel Port Addresses 16 TABLE 2-6a COM Port Selection for UART1 16 TABLE 2-6b COM Port Selection for UART2 16 TABLE 2-7 Address Selection for COM3 and COM4 16 TABLE 3-1 Register Description and Addresses 18 TABLE 3-2 Drive Enable Values 20 TABLE 3-3 Tape Drive Assignment Values 20 TABLE 3-4 Write Precompensation Delays 21 TABLE 3-5 Default Precompensation Delays 21 TABLE 3-6 Data Rate Select Encoding 22 TABLE 4-1 Typical Format Gap Length Values 31 TABLE 4-2 DENSEL Encoding 33 TABLE 4-3 DENSEL Default Encoding 33 TABLE 4-4 Effect of Drive Mode and Data Rate on Format and Write Commands 34 TABLE 4-4a Effect of GAP and WG on Format and Write Commands 34 TABLE 4-5 Sector Size Selection 34 TABLE 4-6 SK Effect on Read Data Command 35 TABLE 4-7 Result Phase Termination Values with No Error 35 TABLE 4-8 SK Effect on Read Deleted Data Command 36 TABLE 4-9 Maximum Recalibrate Step Pulses Based on R255 and ETR 36 TABLE 4-10 Scan Command Termination Values 37 TABLE 4-11 Status Register 0 Termination Codes 38 TABLE 4-12 Set Track Register Address 38 TABLE 4-13 Step Rate (SRT) Values 38 TABLE 4-14 Motor Off Time (MFT) Values 39 TABLE 4-15 Motor On Time (MNT) Values 39 TABLE 4-16 Verify Command Result Phase Table 40 TABLE 6-1 PC87311A UART Register Addresses (AEN e 0) 48 TABLE 6-2 PC87311A Register Summary for an Individual UART Channel 49 TABLE 6-3 PC87311A UART Reset Configuration 50 TABLE 6-4 PC87311A UART Divisors Baud Rates and Clock Frequencies 51 TABLE 6-5 PC87311A Interrupt Control Functions 52 TABLE 6-6 PC87312 UART Register Addresses (AEN e 0) 53 TABLE 6-7 PC87312 Register Summary for an Individual UART Channel 54 TABLE 6-8 PC87312 UART Reset Configuration 55 TABLE 6-9 PC87312 UART Divisors Baud Rates and Clock Frequencies 56 TABLE 6-10 PC87312 Interrupt Control Functions 58 TABLE 7-1 Parallel Interface Register Addresses 59 TABLE 7-2 Data Register Read and Write Modes 59 TABLE 7-3 Parallel Port Mode of Operation 59 TABLE 7-4 Parallel Port Reset States 60 TABLE 8-1 IDE Registers and Their ISA Addresses 61 TABLE 9-1 Nominal tICP tDRP Values 64 TABLE 9-2 Minimum tWDW Values 71 TABLE 10-1 PC87311A87312 Four Floppy Drive Encoding 75 4 |
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