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LP87524B-Q1 Datasheet(PDF) 9 Page - Texas Instruments |
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LP87524B-Q1 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 71 page  9 LP87524B-Q1 www.ti.com SNVSAW2 – APRIL 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Electrical Characteristics (continued) Limits apply over the junction temperature range –40°C ≤ TJ ≤ +140°C, CPOL = 22 µF / phase, specified VVANA, VVIN_Bx , VNRST, VVOUT_Bx and IOUT range, unless otherwise noted. Typical values are at TJ = 25°C, VVANA = VVIN_Bx = 3.7 V, and VOUT = 1 V, unless otherwise noted. (1) (2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Shutdown current consumption From VANA and VIN_Bx pins: NRST = 0 V, VANA = VIN_Bx = 3.7 V 1.4 µA Standby current consumption, regulators disabled From VANA and VIN_Bx pins: NRST = 1.8 V, VANA = VIN_Bx = 3.7 V 6.7 Active current consumption in PFM mode, one regulator enabled, internal RC oscillator, PGOOD monitoring enabled From VANA and VIN_Bx pins: NRST = 1.8 V, VANA = VIN_Bx = 3.7 V, IOUT = 0 mA, not switching 57 µA Active current consumption during PWM operation, per phase 19 mA PLL and clock detector current consumption Additional current consumption when internal RC oscillator, clock detector and PLL are enabled 2 mA DIGITAL INPUT SIGNALS NRST, EN1, EN2, EN3, EN4, SCL, SDA, GPIO1, GPIO2, GPIO3, CLKIN VIL Input low level 0.4 V VIH Input high level 1.2 VHYS Hysteresis of Schmitt Trigger inputs 10 77 200 mV ENx pulldown resistance ENx_PD = 1 500 kΩ NRST pulldown resistance Always present 650 1150 1700 DIGITAL OUTPUT SIGNALS nINT VOL Output low level ISOURCE = 2 mA 0.4 V RP External pullup resistor To VIO supply 10 k Ω DIGITAL OUTPUT SIGNALS SDA VOL Output low level ISOURCE = 10 mA 0.4 V DIGITAL OUTPUT SIGNALS PGOOD, GPIO1, GPIO2, GPIO3 VOL Output low level ISOURCE = 2 mA 0.4 V VOH Output high level, configured to push-pull ISINK = 2 mA VVANA – 0.4 VVANA V VPU Supply voltage for external pull-up resistor, configured to open-drain VVANA V RPU External pullup resistor, configured to open- drain 10 k Ω ALL DIGITAL INPUTS ILEAK Input current All logic inputs over pin voltage range (except NRST) −1 1 µA |
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