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Scaled EDV1 Threshold (SEDV1) — Address 0x78

Initial Standby Load Current and EDV1 Temperature Compensation (ISLC/EDVT) – Address

Digital Magnitude Filter and Self-Discharge Values (DMFSD) — Address 0x7A

bq27010, bq27210

SLUS707B – APRIL 2006 – REVISED JANUARY 2007

This register contains the scaled value of the voltage when the battery has 6.25% remaining capacity at a very

light load. DEDV and EDVT coefficients can be programmed to reduce the EDVI threshold at heavier loads and

at cold temperatures. When the battery reaches this threshold during a valid discharge, the device learns the full

battery capacity, including the remaining unmeasured 6.25%. See the bqJUNIOR Capacity Learning section for

more information on the learning cycles of the device. To calculate the value to program, use the following

equation:

SEDV1 = Design EDV1 (mV) / 8 – 256

0x79

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Name

0

ISLC[2]

ISLC[1]

ISLC[0]

EDVT[3]

EDVT[2]

EDVT[1]

EDVT[0]

The most significant nibble in this register contains the initial standby load current (ISLC) that is transferred to SI

on all resets. The gauge will use this initial value, but will learn the actual system standby current by averaging

in measured discharge currents above the DMF threshold and less than or equal to 2 times the ISLC value.

ISLC is programmed in units of 57.1

µV per bit.

A capacity learning cycle is disqualified if average current is less than or equal to 2 times the ISLC programmed

value.

The equation for programming ISLC is:

The least significant nibble in this register contains the EDV1 temperature compensation (EDVT) coefficient. The

temperature compensation is impedance-based, so the resulting compensation is proportional to load current.

EDVT is programmed to increase the EDV1 rate compensation (programmed in the DEDV coefficient) by 0.78%

GAF/DEDV section for the complete EDV1 compensation equation.

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

NAME

DMF[3]

DMF[2]

DMF[1]

DMF[0]

SD[3]

SD[2]

SD[1]

SD[0]

DMF[3:0]

Sets the digital magnitude filter threshold. See the bqJUNIOR Digital Magnitude Filter section for

more

information

on

the

function

of

the

DMF.

The

value

to

be

programmed

is:

DMF[3:0] = Design Threshold / 4.9

SD[3:0]

Sets the self-discharge rate % per day value at 25

°C. The value to be programmed is:

SD[3:0] = 1.61 / Design SD

NAC is reduced with an estimated self-discharge correction to adjust for the expected self-discharge of the

battery. This estimation is performed only when the battery is not being charged. The rate programmed in

EEPROM for DMFSD determines the self-discharge when 20

°C ≤ TEMP < 30°C. The self-discharge estimation

is doubled for each 10

°C decade hotter than the 20-30°C decade, up to a maximum of 16 times the

programmed rate for TEMP

≥ 60°C and is halved for each 10°C decade colder than the 20-30°C decade, down

to a minimum of 1/4th the programmed rate for TEMP < 0

°C. The self-discharge estimation is performed by

reducing NAC by NAC / 512 at a time interval that achieves the desired estimation. If DMFSD is programmed

with 8 decimal, the self-discharge rate is 0.195% per day in the 20-30

°C decade. This is accomplished by

reducing NAC by NAC / 512 (100 / 512 = 0.195%) a single time every 23.3 hours (0.195 * 24 / 23.3 = 0.2). If

temperature rises by 10

°C, the 0.195% NAC reduction is made every 11.65 hours for a 0.4% per day reduction.

If TAPER[7] = 1, capacity aging is enabled, and there is an LMD reduction of 0.1% (Design Capacity / 1024)

every time there are 8 NAC self-discharge estimate reductions without charging the battery to full.

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