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OPA191_0017 Datasheet(PDF) 33 Page - Texas Instruments |
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OPA191_0017 Datasheet(HTML) 33 Page - Texas Instruments |
33 / 51 page SAR ADC REFP VINP VINM 1 4:2 Mux + + + Antialiasing Filter Gain Network Gain Network High-Voltage Level Translation VCM High-Voltage Multiplexed Input Reference Driver 2 4 Voltage Reference RC Filter Buffer RC Filter 16 Bits 400 kSPS Delay Digital Counter For Multiplexer CONV 5 3 Very Low Output Impedance Input-Filter Bandwidth High-Impedance Inputs No Differential Input Clamps Fast Settling-Time Requirements Attenuate High-Voltage Input Signal Fast-Settling Time Requirements Stability of the Input Driver Attenuate ADC Kickback Noise VREF Output: Value and Accuracy Low Temp and Long-Term Drift Fast logic transition ±20-V, 10-kHz Sine Wave ±20-V, 10-kHz Sine Wave + + + + Shmidtt Trigger Counter REF3240 Voltage Divider OPA350 VCM Generation Circuit n n CH0+ CH0- CH3+ CH3- OPA191 OPA191 OPA191 OPA191 OPA140 OPA191 OPA191 Gain Network 33 OPA191, OPA2191, OPA4191 www.ti.com SBOS701A – DECEMEBER 2015 – REVISED APRIL 2016 Product Folder Links: OPA191 OPA2191 OPA4191 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Typical Applications (continued) 9.2.2 16-Bit Precision Multiplexed Data-Acquisition System Figure 64 shows a 16-bit, differential, 4-channel, multiplexed, data-acquisition system. This example is typical in industrial applications that require low distortion and a high-voltage differential input. The circuit uses the ADS8864, a 16-bit, 400-kSPS successive-approximation-resistor (SAR), analog-to-digital converter (ADC), along with a precision, high-voltage, signal-conditioning front-end, and a 4-channel differential multiplexer (mux). This application example shows the process for optimizing the precision, high-voltage, front-end drive circuit using the OPA191 and OPA140 to achieve excellent dynamic performance and linearity with the ADS8864. The full TI Precision Design can be found in TIDU181. Figure 64. OPA191 in 16-Bit, 400-kSPS, 4-Channel, Multiplexed Data Acquisition System for High-Voltage Inputs With Lowest Distortion 9.2.2.1 Design Requirements The primary objective is to design a ±20-V, differential, 4-channel, multiplexed, data acquisition system with lowest distortion using the 16-bit ADS8864 at a throughput of 400 kSPS for a 10-kHz, full-scale, pure sine-wave input. The design requirements for this block design are: • System supply voltage: ±15 V • ADC supply voltage: 3.3 V • ADC sampling rate: 400 kSPS • ADC reference voltage (REFP): 4.096 V • System input signal: A high-voltage differential input signal with a peak amplitude of 10 V and frequency (fIN) of 10 kHz are applied to each differential input of the mux. 9.2.2.2 Detailed Design Procedure The purpose of this application example is to design an optimal, high-voltage, multiplexed, data-acquisition system for highest system linearity and fast settling. The overall system block diagram is shown in Figure 64. The circuit is a multichannel, data-acquisition, signal chain consisting of an input low-pass filter, multiplexer (mux), mux output buffer, attenuating SAR ADC driver, digital counter for the mux, and the reference driver. The architecture allows fast sampling of multiple channels using a single ADC, providing a low-cost solution. The two |
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