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TPS22810 Datasheet(PDF) 15 Page - Texas Instruments

Part # TPS22810
Description  2.7-18-V, On-Resistance Load Switch With Thermal Protection
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS22810 Datasheet(HTML) 15 Page - Texas Instruments

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VIN
VOUT
CIN
VIN
EN/
UVLO
GND
GATE
CONTROL
Thermal
Shutdown
2.54 V
2.4 V
1.23 V
1.13 V
CL
R1
R2
Copyright © 2016, Texas Instruments Incorporated
15
TPS22810
www.ti.com
SLVSDH0B – DECEMBER 2016 – REVISED MAY 2017
Product Folder Links: TPS22810
Submit Documentation Feedback
Copyright © 2016–2017, Texas Instruments Incorporated
The EN/UVLO pin can be directly driven by a 1.8 V, 3.3 V or 5 V general purpose output pin.
The internal de-glitch delay on EN/UVLO falling edge is intentionally kept low (2.5 μs typical) for quick detection
of power failure. For applications where a higher de-glitch delay on EN/UVLO is desired, or when the supply is
particularly noisy, it is recommended to use an external bypass capacitor from EN/UVLO to GND.
The undervoltage lock out can be programmed by using an external resistor divider from supply VIN terminal to
EN/UVLO terminal to GND as shown in Figure 18. When an undervoltage or input power fail event is detected,
the internal FET is quickly turned off. If the Under-Voltage Lock-Out function is not needed, the EN/UVLO
terminal must be connected to the VIN terminal. EN/UVLO terminal must not be left floating.
The device also implements internal undervoltage-lockout (UVLO) circuitry on the VIN terminal. The device
disables when the VIN terminal voltage falls below internal UVLO Threshold V(UVF). The internal UVLO
threshold has a hysteresis of 125 mV (5% of V(UVR)). See Figure 19 and Figure 20.
Figure 18. Configuring UVLO with External Resistor Network


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