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NS32FX164V-20 Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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NS32FX164V-20 Datasheet(HTML) 3 Page - National Semiconductor (TI) |
3 / 102 page Table of Contents (Continued) 35 System Interface 55 351 Power and Grounding 55 352 Clocking 56 353 Power Save Mode 57 354 Resetting 57 355 Bus Cycles 58 3551 Bus Status 58 3552 Basic Read and Write Cycles 58 3553 Cycle Extension 62 3554 Instruction Fetch Cycles 63 3555 Interrupt Control Cycles 64 3556 Special Bus Cycles 65 3557 Slave Processor Bus Cycles 65 3558 Data Access Sequences 67 3559 Bus Access Control 68 35510 Instruction Status 71 40 DEVICE SPECIFICATIONS 71 41 NS32FX164 Pin Descriptions 71 411 Supplies 71 412 Input Signals 71 413 Output Signals 71 414 Input-Output Signals 72 42 Absolute Maximum Ratings 74 43 Electrical Characteristics 74 44 Switching Characteristics 74 441 Definitions 74 442 Timing Tables 75 4421 Output Signals Internal Propagation Delays 75 4422 Input Signal Requirements 77 443 Timing Diagrams 79 APPENDIX A INSTRUCTION FORMATS 89 APPENDIX B INSTRUCTION EXECUTION TIMES 92 B1 Basic and Floating-Point Instructions 92 B11 Equations 92 B12 Notes on Table Use 93 B13 Calculation of the Execution Time TEX for Basic Instructions 93 B14 Calculation of the Execution Time TEX for Floating-Point Instructions93 B2 Special Graphics Instructions 99 B21 Execution Time Calculation for Special Graphics Instructions 99 B3 DSPM Instructions 100 List of Figures FIGURE 1-1 CPU Block Diagram 1 FIGURE 2-1 NS32FX164 Internal Registers 7 FIGURE 2-2 Processor Status Register (PSR) 8 FIGURE 2-3 Configuration Register (CFG) 9 FIGURE 2-4 DSP Module Registers Address Map 9 FIGURE 2-5 Accumulator Format 9 FIGURE 2-6 X Y Z Registers Format 9 FIGURE 2-7 EABR Register Format 10 FIGURE 2-8 OVF Register Format 10 FIGURE 2-9 PARAM Register Format 10 FIGURE 2-10 REPEAT Register Format 10 FIGURE 2-11 EXT Register Format 11 FIGURE 2-12 CLSTAT Register Format 11 FIGURE 2-13 DSPINT and DSPMASK Register Format 11 FIGURE 2-14 NMISTAT Register Format 11 FIGURE 2-15 NS32FX164 Address Mapping 12 FIGURE 2-16 NS32FX164 Run-Time Environment 13 FIGURE 2-17 General Instruction Format 13 FIGURE 2-18 Index Byte Format 13 FIGURE 2-19 Displacement Encodings 14 FIGURE 2-20 Correspondence between Linear and Cartesian Addressing 20 FIGURE 2-21 32-Pixel by 32-Scan Line Frame Buffer 21 FIGURE 2-22 Overlapping BITBLT Blocks 22 FIGURE 2-23 BB Instructions Format 23 FIGURE 2-24 BITWT Instruction Format 24 FIGURE 2-25 EXTBLT Instruction Format 24 FIGURE 2-26 MOVMPi Instruction Format 24 3 |
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