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NTHS4101P Datasheet(PDF) 1 Page - ON Semiconductor |
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NTHS4101P Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2012 March, 2012 − Rev. 4 1 Publication Order Number: NTHS4101P/D NTHS4101P Power MOSFET −20 V, 6.7 A, P−Channel ChipFETt Features • Offers an Ultra Low RDS(on) Solution in the ChipFET Package • Miniature ChipFET Package 40% Smaller Footprint than TSOP−6 making it an Ideal Device for Applications where Board Space is at a Premium • Low Profile (<1.1 mm) Allows it to Fit Easily into Extremely Thin Environments such as Portable Electronics • Designed to Provide Low RDS(on) at Gate Voltage as Low as 1.8 V, the Operating Voltage used in many Logic ICs in Portable Electronics • Simplifies Circuit Design since Additional Boost Circuits for Gate Voltages are not Required • Operated at Standard Logic Level Gate Drive, Facilitating Future Migration to Lower Levels using the same Basic Topology • Pb−Free Package is Available Applications • Optimized for Battery and Load Management Applications in Portable Equipment such as MP3 Players, Cell Phones, Digital Cameras, Personal Digital Assistant and other Portable Applications • Charge Control in Battery Chargers • Buck and Boost Converters MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS −20 Vdc Gate−to−Source Voltage − Continuous VGS "8.0 Vdc Drain Current − Continuous − 5 seconds ID ID −4.8 −6.7 A Total Power Dissipation Continuous @ TA = 25°C (5 sec) @ TA = 25°C Continuous @ 85°C (5 sec) @ 85°C PD 1.3 2.5 0.7 1.3 W Pulsed Drain Current − tp = 10 ms IDM −190 A Operating Junction and Storage Temperature Range TJ, TSTG −55 to +150 °C Continuous Source Current Is −4.8 A Thermal Resistance (Note 1) Junction−to−Ambient, 5 sec Junction−to−Ambient, Continuous RqJA RqJA 50 95 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq [1 oz] including traces). G S D P−Channel MOSFET Device Package Shipping† ORDERING INFORMATION NTHS4101PT1 ChipFET 3000 Tape / Reel http://onsemi.com −20 V 30 mW @ −2.5 V 21 mW @ −4.5 V RDS(on) TYP −6.7 A ID MAX V(BR)DSS 42 mW @ −1.8 V NTHS4101PT1G ChipFET (Pb−free) 3000 Tape / Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. S D G D D D D D 1 2 3 4 5 6 7 8 PIN CONNECTIONS ChipFET CASE 1206A STYLE 1 MARKING DIAGRAM C6 = Specific Device Code M = Month Code G = Pb−Free Package 1 2 3 4 8 7 6 5 1 8 |
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Similar Description - NTHS4101P_12 |
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