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IDT72V205 Datasheet(PDF) 6 Page - Integrated Device Technology

Part No. IDT72V205
Description  3.3 VOLT CMOS SyncFIFO 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, and 4,096 x 18
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT72V205 Datasheet(HTML) 6 Page - Integrated Device Technology

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IDT72V205/72V215/72V225/72V235/72V245 3.3V CMOS SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
FUNCTIONAL DESCRIPTION
TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH
(FWFT) MODE
The IDT72V205/72V215/72V225/72V235/72V245 support two different
timing modes of operation. The selection of which mode will operate is
determinedduringconfigurationatReset(
RS).Duringa RSoperation,theFirst
Load(
FL),ReadExpansionInput(RXI),andWriteExpansionInput(WXI)pins
are used to select the timing mode per the truth table shown in Table 3. In IDT
Standard Mode, the first word written to an empty FIFO will not appear on the
dataoutputlinesunlessaspecificreadoperationisperformed.Areadoperation,
which consists of activating Read Enable (
REN) and enabling a rising Read
Clock (RCLK) edge, will shift the word from internal memory to the data output
lines. In FWFT mode, the first word written to an empty FIFO is clocked directly
to the data output lines after three transitions of the RCLK signal. A
RENdoes
not have to be asserted for accessing the first word.
Varioussignals,bothinputandoutputsignalsoperatedifferentlydepending
on which timing mode is in effect.
IDT STANDARD MODE
In this mode, the status flags,
FF, PAF, HF, PAE, and EF operate in the
manner outlined in Table 1. To write data into to the FIFO, Write Enable (
WEN)
mustbeLOW.DatapresentedtotheDATAINlineswillbeclockedintotheFIFO
on subsequent transitions of the Write Clock (WCLK). After the first write is
performed, the Empty Flag (
EF)willgoHIGH.Subsequentwriteswillcontinue
to fill up the FIFO. The Programmable Almost-Empty flag (
PAE)willgoHIGH
after n + 1 words have been loaded into the FIFO, where n is the empty offset
value. The default setting for this value is stated in the footnote of Table 1. This
parameter is also user programmable. See section on Programmable Flag
OffsetLoading.
If one continued to write data into the FIFO, and we assumed no read
operationsweretakingplace,theHalf-FullFlag(
HF)wouldtoggletoLOWonce
the 129th (72V205), 257th (72V215), 513th (72V225), 1,025th (72V235), and
2,049th (72V245) word respectively was written into the FIFO. Continuing to
write data into the FIFO will cause the Programmable Almost-Full Flag (
PAF)
togoLOW.Again,ifnoreadsareperformed, the
PAFwillgoLOWafter(256-m)
writes for the IDT72V205, (512-m) writes for the IDT72V215, (1,024-m) writes
for the IDT72V225, (2,048-m) writes for the IDT72V235 and (4,096–m) writes
fortheIDT72V245. Theoffset“m”isthefulloffsetvalue. Thisparameterisalso
userprogrammable.SeesectiononProgrammableFlagOffsetLoading. Ifthere
is no full offset specified, the
PAFwillbeLOWwhenthedeviceis31awayfrom
completelyfullforIDT72V205,63awayfromcompletelyfullforIDT72V215,and
127 away from completely full for the IDT72V225/72V235/72V245.
When the FIFO is full, the Full Flag (
FF)willgoLOW,inhibitingfurtherwrite
operations. Ifnoreadsareperformedafterareset,
FFwillgoLOWafterDwrites
to the FIFO. D = 256 writes for the IDT72V205, 512 for the IDT72V215, 1,024
for the IDT72V225, 2,048 for the IDT72V235 and 4,096 for the IDT72V245,
respectively.
If the FIFO is full, the first read operation will cause
FF to go HIGH.
Subsequent read operations will cause
PAFand the Half-Full Flag (HF) to go
HIGH at the conditions described in Table 1. If further read operations occur,
without write operations, the Programmable Almost-Empty Flag (
PAE)willgo
LOW when there are n words in the FIFO, where n is the empty offset value.
If there is no empty offset specified, the
PAEwillbeLOWwhenthedeviceis31
away from completely empty for IDT72V205, 63 away from completely empty
forIDT72V215,and127awayfromcompletelyemptyforIDT72V225/72V235/
72V245. Continuing read operations will cause the FIFO to be empty. When
thelastwordhasbeenreadfromtheFIFO,the
EFwillgoLOWinhibitingfurther
read operations.
REN is ignored when the FIFO is empty.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags,
IR, PAF, HF, PAE, and OR operate in the
manner outlined in Table 2. To write data into to the FIFO,
WENmustbeLOW.
DatapresentedtotheDATAINlineswillbeclockedintotheFIFOonsubsequent
transitions of WCLK. After the first write is performed, the Output Ready (
OR)
flag will go LOW. Subsequent writes will continue to fill up the FIFO.
PAEwillgo
HIGH after n + 2 words have been loaded into the FIFO, where n is the empty
offsetvalue.ThedefaultsettingforthisvalueisstatedinthefootnoteofTable2.
Thisparameterisalsouserprogrammable.SeesectiononProgrammableFlag
OffsetLoading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the
HF would toggle to LOW once the 130th
(72V205), 258th (72V215), 514th (72V225), 1,026th (72V235), and 2,050th
(72V245) word respectively was written into the FIFO. Continuing to write data
into the FIFO will cause the
PAFtogoLOW.Again,ifnoreadsareperformed,
the
PAF will go LOW after (257-m) writes for the IDT72V205, (513-m) writes
for the IDT72V215, (1,025-m) writes for the IDT72V225, (2,049–m) writes for
the IDT72V235 and (4,097–m) writes for the IDT72V245, where m is the full
offset value. The default setting for this value is stated in the footnote of Table
2.
WhentheFIFOisfull,theInputReady(
IR)flagwillgoHIGH,inhibitingfurther
write operations. If no reads are performed after a reset,
IRwillgoHIGHafter
DwritestotheFIFO. D=257writesfortheIDT72V205,513fortheIDT72V215,
1,025 for the IDT72V225, 2,049 for the IDT72V235 and 4,097 for the
IDT72V245. Note that the additional word in FWFT mode is due to the capacity
of the memory plus output register.
If the FIFO is full, the first read operation will cause the
IR flag to go LOW.
Subsequent read operations will cause the
PAF and HF to go HIGH at the
conditions described in Table 2. If further read operations occur, without write
operations,the
PAEwillgoLOWwhentherearen+1wordsintheFIFO,where
n is the empty offset value. If there is no empty offset specified, the
PAEwillbe
LOW when the device is 32 away from completely empty for IDT72V205, 64
away from completely empty for IDT72V215, and 128 away from completely
emptyforIDT72V225/72V235/72V245.Continuingreadoperationswillcause
the FIFO to be empty. When the last word has been read from the FIFO,
OR
will go HIGH inhibiting further read operations.
RENisignoredwhentheFIFO
isempty.
PROGRAMMABLE FLAG LOADING
FullandEmptyflagoffsetvaluescanbeuserprogrammable.TheIDT72V205/
72V215/72V225/72V235/72V245 has internal registers for these offsets.
DefaultsettingsarestatedinthefootnotesofTable1andTable2.Offsetvalues
are loaded into the FIFO using the data input lines D0-D11. To load the offset
registers, the Load (
LD)pinandWENpinmustbeheldLOW.Datapresenton
D0-D11willbetransferredintotheEmptyOffsetregisteronthefirstLOW-to-HIGH
transitionofWCLK.Bycontinuingtoholdthe
LDandWENpinlow, datapresent
on D0-D11 will be transferred into the Full Offset register on the next transition
oftheWCLK.ThethirdtransitionagainwritestotheEmptyOffsetregister. Writing
alloffsetregistersdoesnothavetooccuratonetime.Oneortwooffsetregisters
can be written and then by bringing the
LD pin HIGH, the FIFO is returned to
normal read/write operation. When the
LD pin and WEN are again set LOW,
the next offset register in sequence is written.


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