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XRA1402IG16TR-F Datasheet(PDF) 3 Page - Exar Corporation |
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XRA1402IG16TR-F Datasheet(HTML) 3 Page - Exar Corporation |
3 / 14 page XRA1402 3 REV. 1.0.0 8-BIT SPI GPIO EXPANDER PIN DESCRIPTIONS Pin Description NAME PIN# PIN# TYPE DESCRIPTION SPI INTERFACE SO 13 15 O SPI serial data output. SCL 12 14 I SPI bus serial input clock. IRQ# 11 13 OD Interrupt output (open-drain, active LOW). CS# 15 1 I SPI bus chip select. SI 16 2 I SPI serial data input. RESET# 1 3 I Reset (active LOW) - A longer than 40 ns LOW pulse on this pin will reset the internal registers and all GPIOs will be configured as inputs. GPIOs P0 P1 P2 P3 P4 P5 P6 P7 2 3 4 5 7 8 9 10 4 5 6 7 9 10 11 12 I/O I/O I/O I/O I/O I/O I/O I/O General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power- up or after a reset. ANCILLARY SIGNALS VCC 14 16 Pwr 1.65V to 3.6V VCC supply voltage. GND 6 8 Pwr Power supply common, ground. GND Center Pad - Pwr The exposed pad at the bottom surface of the package is designed for thermal performance. Use of a center pad on the PCB is strongly recommended for ther- mal conductivity as well as to provide mechanical stability of the package on the PCB. The center pad is recommended to be solder masked defined with open- ing size less than or equal to the exposed thermal pad on the package bottom to prevent solder bridging to the outer leads of the device. Thermal vias must be connected to GND plane as the thermal pad of package is at GND potential. Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. QFN-16 TSSOP-16 |
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