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MM54C165 Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. MM54C165
Description  Parallel-Load 8-Bit Shift Register
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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MM54C165 Datasheet(HTML) 1 Page - National Semiconductor (TI)

   
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TLF5897
December 1992
MM54C165MM74C165
Parallel-Load 8-Bit Shift Register
General Description
The MM54C165MM74C165 functions as an 8-bit parallel-
load serial shift register Data is loaded into the register
independent of the state of the clock(s) when PARALLEL
LOAD (PL) is low Shifting is inhibited as long as PL is low
Data is sequentially shifted from complementary outputs Q7
and Q7 highest-order bit (P7) first New serial data may be
entered via the SERIAL DATA (Ds) input Serial shifting oc-
curs on the rising edge of CLOCK1 or CLOCK2 Clock in-
puts may be used separately or together for combined
clocking from independent sources Either clock input may
be used also as an active-low clock enable To prevent dou-
ble-clocking when a clock input is used as an enable the
enable must be changed to a high level (disabled) only while
the clock is high
Features
Y
Wide supply voltage range
3V to 15V
Y
Guaranteed noise margin
1V
Y
High noise immunity
045 VCC (typ)
Y
Low power TTL compatibility
fan out of 2
driving 74L
Y
Parallel loading independent of clock
Y
Dual clock inputs
Y
Fully static operation
Connection and Block Diagrams
Dual-In-Line Package
TLF5897 – 1
Top View
TLF5897 – 2
Order Number MM54C165 or MM74C165
Please look into Section 8 Appendix D
for availability of various package types
TLF5897 – 3
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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