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AM29LV065DU90REEN Datasheet(PDF) 22 Page - Advanced Micro Devices |
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AM29LV065DU90REEN Datasheet(HTML) 22 Page - Advanced Micro Devices |
22 / 52 page January 10, 2002 Am29LV065D 21 Table 7. System Interface String Table 8. Device Geometry Definition Addresses (x8) Data Description 1Bh 27h V CC Min. (write/erase) D7–D4: volt, D3–D0: 100 millivolt 1Ch 36h V CC Max. (write/erase) D7–D4: volt, D3–D0: 100 millivolt 1Dh 00h V PP Min. voltage (00h = no VPP pin present) 1Eh 00h V PP Max. voltage (00h = no VPP pin present) 1Fh 04h Typical timeout per single byte write 2 N µs 20h 00h Typical timeout for Min. size buffer write 2 N µs (00h = not supported) 21h 0Ah Typical timeout per individual block erase 2 N ms 22h 00h Typical timeout for full chip erase 2 N ms (00h = not supported) 23h 05h Max. timeout for byte write 2 N times typical 24h 00h Max. timeout for buffer write 2 N times typical 25h 04h Max. timeout per individual block erase 2 N times typical 26h 00h Max. timeout for full chip erase 2 N times typical (00h = not supported) Addresses (x8) Data Description 27h 17h Device Size = 2 N byte 28h 29h 00h 00h Flash Device Interface description (refer to CFI publication 100) 2Ah 2Bh 00h 00h Max. number of bytes in multi-byte write = 2 N (00h = not supported) 2Ch 01h Number of Erase Block Regions within device 2Dh 2Eh 2Fh 30h 7Fh 00h 00h 01h Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) 31h 32h 33h 34h 00h 00h 00h 00h Erase Block Region 2 Information (refer to CFI publication 100) 35h 36h 37h 38h 00h 00h 00h 00h Erase Block Region 3 Information (refer to CFI publication 100) 39h 3Ah 3Bh 3Ch 00h 00h 00h 00h Erase Block Region 4 Information (refer to CFI publication 100) |
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