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74HC00PW Datasheet(PDF) 5 Page - NXP Semiconductors

Part No. 74HC00PW
Description  Quad 2-input NAND gate
Download  17 Pages
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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74HC00PW Datasheet(HTML) 5 Page - NXP Semiconductors

 
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2003 Jun 30
5
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74HC00; 74HCT00
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. For DIP14 packages: above 70
°C derate linearly with 12 mW/K.
For SO14 packages: above 70
°C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60
°C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
°C derate linearly with 4.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
74HC00
74HCT00
UNIT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
VCC
supply voltage
2.0
5.0
6.0
4.5
5.0
5.5
V
VI
input voltage
0
VCC
0
VCC
V
VO
output voltage
0
VCC
0
VCC
V
Tamb
operating ambient
temperature
see DC and AC
characteristics per
device
−40
+25
+125
−40
+25
+125
°C
tr,tf
input rise and fall times
VCC = 2.0 V
−−
1000
−−−
ns
VCC = 4.5 V
6.0
500
6.0
500
ns
VCC = 6.0 V
−−
400
−−−
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
−0.5
+7.0
V
IIK
input diode current
VI < −0.5 V or VI >VCC + 0.5 V
−±20
mA
IOK
output diode current
VO < −0.5 V or VO >VCC + 0.5 V
−±20
mA
IO
output source or sink
current
−0.5V<VO <VCC + 0.5 V
−±25
mA
ICC, IGND
VCC or GND current
−±50
mA
Tstg
storage temperature
−65
+150
°C
Ptot
power dissipation
Tamb = −40 to +125 °C; note 1
500
mW


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