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Electronic Components Datasheet Search |
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MF10 Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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MF10 Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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Electrical Characteristics (Continued) Va ea500V and Vb eb500V unless otherwise specified Boldface limits apply for TMIN to TMAX all other limits TA e TJ e 25 C MF10ACN MF10CCN MF10CCJ MF10AJ MF10ACWM MF10CCWM Symbol Parameter Conditions Typical Tested Design Typical Tested Design Units (Note 8) Limit Limit (Note 8) Limit Limit (Note 9) (Note 10) (Note 9) (Note 10) VOUT Minimum Output BP LP Pins RL e 5k g 425 g 38 g 38 g 425 g 38 V Voltage Swing NAPHP Pin RL e 35k g 425 g 38 g 38 g 425 g 36 V GBW Op Amp Gain BW Product 25 25 MHz SR Op Amp Slew Rate 7 7 V ms Dynamic Range Vpin12 ea5V 83 83 dB (Note 6) (fCLK fO e 50) Vpin12 e 0V 80 80 dB (fCLK fO e 100) ISC Maximum Output Short Source 20 20 mA Circuit Current (Note 7) Sink 30 30 mA Logic Input Characteristics Boldface limits apply for T MIN to TMAX all other limits T A e TJ e 25 C MF10ACN MF10CCN MF10CCJ MF10AJ MF10ACWM MF10CCWM Parameter Conditions Typical Tested Design Typical Tested Design Units (Note 8) Limit Limit (Note 8) Limit Limit (Note 9) (Note 10) (Note 9) (Note 10) CMOS Clock Min Logical ‘‘1’’ Va ea5V Vb eb5V a 30 a 30 a 30 V Input Voltage Max Logical ‘‘0’’ VLSh e 0V b 30 b 30 b 30 V Min Logical ‘‘1’’ Va ea10V Vb e 0V a 80 a 80 a 80 V Max Logical ‘‘0’’ VLSh ea5V a 20 a 20 a 20 V TTL Clock Min Logical ‘‘1’’ Va ea5V Vb eb5V a 20 a 20 a 20 V Input Voltage Max Logical ‘‘0’’ VLSh e 0V a 08 a 08 a 08 V Min Logical ‘‘1’’ Va ea10V Vb e 0V a 20 a 20 a 20 V Max Logical ‘‘0’’ VLSh a 08 a 08 a 08 V Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions Note 2 When the input voltage (VIN) at any pin exceeds the power supply rails (VIN k Vb or VIN l Va) the absolute value of current at that pin should be limited to 5 mA or less The 20 mA package input current limits the number of pins that can exceed the power supply boundaries witha5mA current limit to four Note 3 The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX iJA and the ambient temperature TA The maximum allowable power dissipation at any temperature is PD e (TJMAX b TA) iJA or the number given in the Absolute Maximum Ratings whichever is lower For this device TJMAX e 125 C and the typical junction-to-ambient thermal resistance of the MF10ACNCCN when board mounted is 55 CW For the MF10AJCCJ this number increases to 95 CW and for the MF10ACWMCCWM this number is 66 CW Note 4 The accuracy of the Q value is a function of the center frequency (fO) This is illustrated in the curves under the heading ‘‘Typical Performance Characteristics’’ Note 5 VOS1 VOS2 and VOS3 refer to the internal offsets as discussed in the Applications Information Section 34 Note 6 For g5V supplies the dynamic range is referenced to 282V rms (4V peak) where the wideband noise over a 20 kHz bandwidth is typically 200 mV rms for the MF10 with a 501 CLK ratio and 280 mV rms for the MF10 with a 1001 CLK ratio Note 7 The short circuit source current is measured by forcing the output that is being tested to its maximum positive voltage swing and then shorting that output to the negative supply The short circuit sink current is measured by forcing the output that is being tested to its maximum negative voltage swing and then shorting that output to the positive supply These are the worst case conditions Note 8 Typicals are at 25 C and represent most likely parametric norm Note 9 Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level) Note 10 Design limits are guaranteed but not 100% tested These limits are not used to calculate outgoing quality levels Note 11 Human body model 100 pF discharged through a 15 kX resistor 3 |
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