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VNC2-32L1B-REEL Datasheet(PDF) 61 Page - Future Technology Devices International Ltd. |
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VNC2-32L1B-REEL Datasheet(HTML) 61 Page - Future Technology Devices International Ltd. |
61 / 88 page 61 C opyright © Future T ec hnology Devic es I nternational Limited Datasheet Vinculum-II Embedded Dual USB Host Controller IC V ers ion 1 .7 Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43 6.7 Parallel FIFO – Synchronous Mode The Parallel FIFO Synchronous mode has an eight bit data bus, individual read and write strobes, two hardware flow control signals, an output enable and a clock out. The synchronous FIFO mode uses the parallel FIFO interface signals detailed in Table 6.16 and an additional two signals detailed in Table 6.18. This mode is not available on the 32 pin packages. 64 Pin Package Available pins 48 Pin Package Available pins 32 Pin Package Available pins Name Type Description 11, 15, 19, 24, 28, 39, 43, 47, 51, 57, 61 11, 15, 20, 31, 35, 41, 45 11, 23 29 fifo_oe# I/O FIFO Output enable 12, 16, 20, 25, 29, 40, 44, 48, 52, 58, 62 12,16, 21, 32, 36, 42, 46 12, 24, 30 fifo_clkout I/O FIFO Clock out Table 6.18 Synchronous FIFO control signals |
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