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FT232HQ-TRAY Datasheet(PDF) 17 Page - Future Technology Devices International Ltd. |
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FT232HQ-TRAY Datasheet(HTML) 17 Page - Future Technology Devices International Ltd. |
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17 / 66 page  Copyright © Future Technology Devices International Limited 17 Document No.: FT_000288 FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC Datasheet Version 1.82 Clearance No.: FTDI #199 3.5.3 FT232H pins used in an FT245 Style Asynchronous FIFO Interface The FT232H can be configured as a FT245 style asynchronous FIFO interface. When configured in this mode, the pins used and the descriptions of the signals are shown in Table 3.8. To enter this mode the external EEPROM must be set to 245 asynchronous FIFO mode. In this mode, data is written or read on the falling edge of the RD# or WR# signals. Pin No. Name Type FT245 Configuration Description 13, 14, 15, 16, 17, 18, 19,20 ADBUS[7:0] I/O D7 to D0 bidirectional FIFO data. This bus is normally input unless RD# is low. 21 RXF# OUTPUT When high, do not read data from the FIFO. When low, there is data available in the FIFO which can be read by driving RD# low. When RD# goes high again RXF# will always go high and only become low again if there is another byte to read. During reset this signal pin is tri-state, but pulled up to VCCIO via an internal 200kΩ resistor. 25 TXE# OUTPUT When high, do not write data into the FIFO. When low, data can be written into the FIFO by strobing WR# high, then low. During reset this signal pin is tri-state, but pulled up to VCCIO via an internal 200kΩ resistor. 26 RD# INPUT Enables the current FIFO data byte to be driven onto D0...D7 when RD# goes low. Fetches the next FIFO data byte (if available) from the receive FIFO buffer when RD# goes high. 27 WR# INPUT Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR# goes from high to low. 28 SIWU# INPUT The Send Immediate / WakeUp signal combines two functions on a single pin. If USB is in suspend mode (PWREN# = 1) and remote wakeup is enabled in the EEPROM, strobing this pin low will cause the device to request a resume on the USB Bus. Normally, this can be used to wake up the Host PC. During normal operation (PWREN# = 0), if this pin is strobed low any data in the device RX buffer will be sent out over USB on the next Bulk-IN request from the drivers regardless of the pending packet size. This can be used to optimize USB transfer speed for some applications. Tie this pin to VCCIO if not used. Table 3.8 FT245 Style Asynchronous FIFO Configured Pin Descriptions For a functional description of this mode, please refer to section 4.5 |
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