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DA14583-01F01AT2 Datasheet(PDF) 1 Page - Dialog Semiconductor |
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DA14583-01F01AT2 Datasheet(HTML) 1 Page - Dialog Semiconductor |
1 / 150 page Datasheet Revision 3.0 04-Nov-2016 CFR0011-120-01 1 of 150 © 2014 Dialog Semiconductor DA14583 Bluetooth Low Energy 4.2 SoC with Flash Memory FINAL General Description The DA14583 integrated circuit has a fully integrated radio transceiver and baseband processor for Blue- tooth® low energy. It can be used as a standalone application processor or as a data pump in hosted sys- tems. The DA14583 supports a flexible memory architecture, including 1 Mbit of Flash memory, for storing Bluetooth profiles and custom application code, which can be updated over the air (OTA). The qualified Bluetooth low energy protocol stack is stored in a dedicated ROM. All software runs on the ARM® Cortex®-M0 processor via a simple scheduler. The Bluetooth low energy firmware includes the L2CAP service layer protocols, Security Manager (SM), Attribute Protocol (ATT), the Generic Attribute Profile (GATT) and the Generic Access Profile (GAP). All profiles published by the Bluetooth SIG as well as custom profiles are supported. The transceiver interfaces directly to the antenna and is fully compliant with the Bluetooth 4.2 standard. The DA14583 has dedicated hardware for the Link Layer implementation of Bluetooth low energy and interface controllers for enhanced connectivity capabili- ties. Features Complies with Bluetooth V4.2, ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US) and ARIB STD-T66 (Japan) Processing power 16 MHz 32 bit ARM Cortex-M0 with SWD inter- face Dedicated Link Layer Processor AES-128 bit encryption Processor Memories 1 Mbit Flash memory 32 kB One-Time-Programmable (OTP) memory 42 kB System SRAM 84 kB ROM 8 kB Retention SRAM Power management Integrated Buck mode DC-DC converter Embedded charge pump for Flash programming P0, P1, and P2 ports with 3.3 V tolerance Supports coin (typ. 3.0 V) battery cells 10-bit ADC for battery voltage measurement Digital controlled oscillators 16 MHz crystal (±20 ppm max) and RC oscillator 32 kHz crystal (±50 ppm, ±500 ppm max) and RCX oscillator General purpose, Capture and Sleep timers Digital interfaces 24 general purpose I/Os 2 UARTs with hardware flow control up to 1 MBd SPI+™ interface I2C bus at 100 kHz, 400 kHz 3-axes capable Quadrature Decoder Analog interfaces 4-channel 10-bit ADC Radio transceiver Fully integrated 2.4 GHz CMOS transceiver Single wire antenna: no RF matching or RX/TX switching required Supply current at VBAT3V: TX: 3.4 mA, RX: 3.7 mA (with ideal DC-DC) 0 dBm transmit output power -20 dBm output power in “Near Field Mode” -93 dBm receiver sensitivity Packages: QFN 40 pins, 5 mm x 5 mm ________________________________________________________________________________________________ System Diagram |
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