 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DA14582 Datasheet(PDF) 25 Page - Dialog Semiconductor |
|
||||||||||||||||||||||||||||||
DA14582 Datasheet(HTML) 25 Page - Dialog Semiconductor |
|
|
25 / 172 page  Datasheet Revision 3.0 08-Nov-2016 CFR0011-120-01 25 of 172 © 2015 Dialog Semiconductor DA14582 Bluetooth Low Energy 4.2 SoC with Audio CODEC FINAL 29:28 r/w OTPC_MODE_PRG_ PORT_MUX Selects the source that is connected to the prg_port port of the controller. 00 - {16'd0, BANDGAP_REG[15:0]} 01 - {RF_RSSI_COMP_CTRL_REG[15:0], 8'd0, RFIO_CTRL1_REG{7:0]} 10 - {3'd0, RF_LNA_CTRL3_REG[4:0], RF_LNA_CTRL2_REG[11:0], RF_LNA_CTRL1_REG[11:0]} 11 - {28'd0, RF_VCO_CTRL_REG[3:0]} See OTPC_MODE_PRG_PORT_SEL about the use of the prg_port 0x0 27:9 - - Reserved 0x0 8 r/w OPTC_MODE_PRG_ FAST Defines the timing that will be used for all the programming activities (APROG, MPROG and TWR) 0 - Selects the normal timing 1 - Selects the fast timing 0 7 r/w OTPC_MODE_PRG_ PORT_SEL Selects an alternative data source for the programming of the OTP macrocells, when the controller is configured in APROG mode. 0 - The fifo will be used as the data source. The fifo will be filled with a way defined by the register OTPC_MODE_USE_DMA. The number of words that will be programmed is defined by OTPC_NWORDS. 1 - Only one word will programmed. The value of the word is contained in the prg_port port of the controller. The values of the registers OTPC_MODE_USE_DMA, OTPC_NWORDS and the contents of the FIFO will not be used. 0x0 6 r/w OTPC_MODE_TWO _CC_ACC Defines the duration of each read from the OTP macrocells. 0 - Reads 16 bits of data every one clock cycle. 1 - Reads 16 bits of data every two clock cycles. 0x0 5 r/w OTPC_MODE_FIFO _FLUSH Writing 1, removes any content from the FIFO. This bit returns automatically to 0. 0x0 4 r/w OTPC_MODE_USE_ DMA Selects the use of the dma, when the controller is configured in one of the modes: AREAD or APROG. 0 - DMAis not used. The data should be transfered from/to controller through OTPC_FFPRT_REG 1 - DMA is used. Data transfers from/to controller are per- formed automatically. The AHB base address should be con- figured in OTPC_AHBADR_REG before the selection of the mode. If programming of the OTPC_MODE_REG is performed through the serial interface,the OTPC_MODE_USE_DMA will be set to 0 automatically. If the controller is in APROG mode and the OTPC_MODE_PRG_PORT_SEL is enabled, the dma will stay inactive. 0x0 3 - - Reserved 0x0 Table 5: OTPC_MODE_REG (0x40008000) Bit Mode Symbol Description Reset |
Similar Part No. - DA14582_16 |
|
Similar Description - DA14582_16 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
