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YMF721 Datasheet(PDF) 5 Page - LSI Computer Systems |
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YMF721 Datasheet(HTML) 5 Page - LSI Computer Systems |
5 / 41 page YMF721 July 10, 1997 - 5 - BLOCK DIAGRAM OPL3 FM Synthesizer Wavetable Synthesizer ISA BUS Interface TEST Logic Decode Logic Timing Generator Synthesizer Interface (arbitration etc.) UART Register Control (MPU/Command /Control) Micro Processor MIDI Interpreter Command Interpreter Wave ROM 1M byte ROM 256kbit SRAM 32kbit XO XI RXD /RESETSEL FSP RST /IOW,/IOR /MPUCS,/OPLCS A[2-0] ADB[7-0] DO3 DO1 DO2 DO0 /PDOUT CLKO BCO LRO WCO |
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