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Ultra37000 CPLD Family
Document #: 38-03007 Rev. *B
Page 6 of 63
f
Figure 2. I/O and Buried Macrocells
Figure 3. Input Macrocell
C2 C3
DECODE
C2 C3
DECODE
0
1
2
3
O
C6 C5
“0”
“1”
0
1
O
D/T/L
Q
R
P
0
1
2
3
O
C0
0
1
O
C4
FEEDBACK TO PIM
FEEDBACK TO PIM
BLOCK RESET
0
−16
TERMS
I/O MACROCELL
I/O CELL
FROM PTM
0
1
O
D/T/L
Q
R
P
FROM PTM
1
O
C7
FEEDBACK TO PIM
BURIED MACROCELL
0
ASYNCHRONOUS
PRODUCT
0
−16
TERMS
PRODUCT
C1
4
0
1
2
3
Q
4
C24
C0 C1 C24
C25
C25
4 SYNCHRONOUS CLOCKS (CLK0,CLK1,CLK2,CLK3)
1 ASYNCHRONOUS CLOCK(PTCLK)
BLOCK PRESET
ASYNCHRONOUS
FAST
SLOW
C26
SLEW
0
1
0
1
0
1
0
1
OE0 OE1
0
1
2
3
O
C12 C13
TO PIM
D
Q
D
Q
D
Q
LE
INPUT PIN
0
1
2
O
C10
FROM CLOCK
POLARITY MUXES
3
C11
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