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SN75LBC182PE4 Datasheet(PDF) 1 Page - Texas Instruments |
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SN75LBC182PE4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 15 page SN65LBC182 SN75LBC182 SLLS500A − MAY 2001 − REVISED MARCH 2005 DIFFERENTIAL BUS TRANSCEIVER A DE B RE D R functional block diagram 3 4 2 1 6 7 1 www.ti.com FEATURES D One-Fourth Unit Load Allows up to 128 Devices on a Bus D ESD Protection for Bus Terminals: − ±15-kV Human Body Model − ±8-kV IEC61000-4-2, Contact Discharge − ±15-kV IEC61000-4-2, Air-Gap Discharge D Meets or Exceeds the Requirements of ANSI Standard TIA/EIA-485-A and ISO 8482: 1987(E) D Controlled Driver Output-Voltage Slew Rates Allow Longer Cable Stub Lengths D Designed for Signaling Rates† Up to 250-kbps D Low Disabled Supply Current ... 250 µA Max D Thermal Shutdown Protection D Open-Circuit Fail-Safe Receiver Design D Receiver Input Hysteresis ... 70 mV Typ D Glitch-Free Power-Up and Power-Down Protection APPLICATIONS D Utility Meters D Industrial Process Control D Building Automation DESCRIPTION The SN65LBC182 and SN75LBC182 are differential data line transceivers with a high level of ESD protection in the trade-standard footprint of the SN75176. They are designed for balanced transmission lines and meet ANSI standard TIA/EIA-485-A and ISO 8482. The SN65LBC182 and SN75LBC182 combine a 3-state, differential line driver and differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can be externally connected together to function as a direction control. The driver outputs and the receiver inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus. This port operates over a wide range of common-mode voltage, making the device suitable for party-line applications. The device also includes additional features for party-line data buses in electrically noisy environment applications such as industrial process control or power inverters. The SN75LBC182 and SN65LBC182 bus pins also exhibit a high input resistance equivalent to one-fourth unit load allowing connection of up to 128 similar devices on the bus. The high ESD tolerance protects the device for cabled connections. (For an even higher level of protection, see the SN65/75LBC184, literature number SLLS236.) The differential driver design incorporates slew-rate-controlled outputs sufficient to transmit data up to 250 kbps. Slew-rate control allows longer unterminated cable runs and longer stub lengths from the main backbone than possible with uncontrolled voltage transitions. The receiver design provides a fail-safe output of a high level when the inputs are left floating (open circuit). Very low device supply current can be achieved by disabling the driver and the receiver. The SN65LBC182 is characterized for operation from −40 °C to 85°C, and the SN75LBC182 is characterized for operation from 0 °C to 70°C. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. †The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second). Copyright 2001, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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