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NCV8501PDW100R2 Datasheet(PDF) 10 Page - ON Semiconductor |
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NCV8501PDW100R2 Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 16 page NCV8501 Series http://onsemi.com 10 CIRCUIT DESCRIPTION REGULATOR CONTROL FUNCTIONS The NCV8501 contains the microprocessor compatible control function RESET (Figure 13). Figure 13. Reset and Delay Circuit Wave Forms VIN VOUT RESET DELAY (VDT) Threshold DELAY Threshold RESET Td Td RESET Function A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 6.0% of the regulated output voltage, or when VOUT drops out of regulation,and is lower than 8.0% below the regulated output voltage. Hysteresis is included in the function to minimize oscillations. The RESET output is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC thereby guaranteeing that the RESET signal is valid for VOUT as low as 1.0 V. ENABLE Function The part stays in a low IQ sleep mode when the ENABLE pin is held low. The part has an internal pull down if the pin is left floating. This is intended for failure modes only. An external connection (active pulldown, resistor, or switch) for normal operation is recommended. The integrity of the ENABLE pin allows it to be tied directly to the battery line through an external resistor. It will withstand load dump potentials in this configuration. Figure 14. ENABLE Function VIN VOUT GND NCV8501 ENABLE VBAT 10 k DELAY Function The reset delay circuit provides a programmable (by external capacitor) delay on the RESET output lead. The DELAY lead provides source current (typically 2.5 mA) to the external DELAY capacitor during the following proceedings: 1. During Power Up (once the regulation threshold has been verified). 2. After a reset event has occurred and the device is back in regulation. The DELAY capacitor is discharged when the regulation (RESET threshold) has been violated. This is a latched incident. The capacitor will fully discharge and wait for the device to regulate before going through the delay time event again. FLAG/Monitor Function An on−chip comparator is provided to perform an early warning to the microprocessor of a possible reset signal. The reset signal typically turns the microprocessor off instantaneously. This can cause unpredictable results with the microprocessor. The signal received from the FLAG pin will allow the microprocessor time to complete its present task before shutting down. This function is performed by a comparator referenced to the bandgap reference. The actual trip point can be programmed externally using a resistor divider to the input monitor (MON) (Figure 15). The typical threshold is 1.20 V on the MON pin. Figure 15. FLAG/Monitor Function VBAT VIN MON VOUT COUT VCC I/O RESET mP FLAG RESET GND DELAY NCV8501 RADJ Voltage Adjust Figure 16 shows the device setup for a user configurable output voltage. The feedback to the VADJ pin is taken from a voltage divider referenced to the output voltage. The loop is balanced around the Unity Gain threshold (1.28 V typical). Figure 16. Adjustable Output Voltage VOUT VADJ NCV8501 15 k 5.1 k COUT ≈5.0 V 1.28 V |
Similar Part No. - NCV8501PDW100R2 |
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Similar Description - NCV8501PDW100R2 |
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