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LMX2312USLDX Datasheet(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LMX2312USLDX
Description  PLLatinum??Ultra Low Power Frequency Synthesizer for RF Personal Communications
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMX2312USLDX Datasheet(HTML) 7 Page - National Semiconductor (TI)

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Electrical Characteristics (Continued)
V
CC =VP =VµC = 3.0V, −40˚C < TA < +85˚C unless specified otherwise.
Symbol
Parameter
Conditions (Note 3)
Min
Typ
Max
Units
PHASE NOISE CHARACTERISTICS
L
N(f)
Normalized Single
Side-Band Phase Noise
Fφ = 200 kHz
F
OSC =10MHz
V
OSC = 1.0 VPP
ICP
O =4mA
T
A = 25˚C
(Note 11)
−159
dBc/Hz
L(f)
Single Side-Band Phase
Noise
LMX2310U
F
IN = 2450 MHz
Fφ = 200 kHz
F
OSC =10MHz
V
OSC = 1.0 VPP
ICP
O =4mA
T
A = 25˚C
(Note 12)
−78
dBc/Hz
LMX2311U
F
IN = 1960 MHz
Fφ = 200 kHz
F
OSC =10MHz
V
OSC = 1.0 VPP
ICP
O =4mA
T
A = 25˚C
(Note 12)
−80
dBc/Hz
LMX2312U
F
IN = 902 MHz
Fφ = 200 kHz
F
OSC =10MHz
V
OSC = 1.0 VPP
ICP
O =4mA
T
A = 25˚C
(Note 12)
−85
dBc/Hz
LMX2313U
F
IN = 450 MHz
Fφ =50kHz
F
OSC =10MHz
V
OSC = 1.0 VPP
ICP
O =4mA
T
A = 25˚C
(Note 12)
−85
dBc/Hz
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the conditions listed.
Note 2: This device is a high performance RF integrated circuit with an ESD rating <2 kV. Handling and assembly of this device should only be done at ESD free
workstations.
Note 3: Typical Conditions are at a TA of 25˚C.
Note 4: Icc current is measured with Clock, Data and LE pins connected to GND. OSCin and Fin pins are connected to Vcc. PWDN bit is program to 0. Icc current
is the current into Vcc pin.
Note 5: See FIN Sensitivity Test Setup.
Note 6: See OSCIN Sensitivity Test Setup.
Note 7: Charge Pump Magnitude is controlled by CPo_4X bit [R18].
Note 8: See Charge Pump Measurement Definition for detail on how these measurements are made.
Note 9: Analog Lock Detect open drain output pin only can be pulled up to Vext that will not exceed 6.5V.
Note 10: See Serial Input Data Timing.
Note 11: Normalized Single-Side Band Phase Noise is defined as: LN(f) = L(f) − 20 log (FIN/Fφ), where L(f) is defined as the Single Side-Band Phase Noise.
www.national.com
7


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