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MC68302FC20 Datasheet(PDF) 8 Page - Motorola, Inc

Part No. MC68302FC20
Description  Integrated Multiprotocol Processor User’s Manual
Download  480 Pages
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC68302FC20 Datasheet(HTML) 8 Page - Motorola, Inc

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Table of Contents
Paragraph
Title
Page
Number
Number
viii
MC68302 USER’S MANUAL
MOTOROLA
4.4.5
Serial Interface Registers.......................................................................4-19
4.4.5.1
Serial Interface Mode Register (SIMODE).............................................4-19
4.4.5.2
Serial Interface Mask Register (SIMASK)..............................................4-22
4.5
Serial Communication Controllers (SCCs).............................................4-22
4.5.1
SCC Features ........................................................................................4-24
4.5.2
SCC Configuration Register (SCON).....................................................4-24
4.5.2.1
Asynchronous Baud Rate Generator Examples ....................................4-26
4.5.2.2
Synchronous Baud Rate Generator Examples ......................................4-27
4.5.3
SCC Mode Register (SCM)....................................................................4-27
4.5.4
SCC Data Synchronization Register (DSR)...........................................4-31
4.5.5
Buffer Descriptors Table ........................................................................4-32
4.5.6
SCC Parameter RAM Memory Map.......................................................4-34
4.5.6.1
Data Buffer Function Code Register (TFCR, RFCR) .............................4-35
4.5.6.2
Maximum Receive Buffer Length Register (MRBLR) ............................4-36
4.5.6.3
Receiver Buffer Descriptor Number (RBD#) ..........................................4-36
4.5.6.4
Transmit Buffer Descriptor Number (TBD#)...........................................4-36
4.5.6.5
Other General Parameters.....................................................................4-37
4.5.7
SCC Initialization....................................................................................4-37
4.5.8
Interrupt Mechanism ..............................................................................4-38
4.5.8.1
SCC Event Register (SCCE) .................................................................4-38
4.5.8.2
SCC Mask Register (SCCM) .................................................................4-39
4.5.8.3
SCC Status Register (SCCs) .................................................................4-39
4.5.8.4
Bus Error on SDMA Access...................................................................4-40
4.5.9
SCC Transparent Mode .........................................................................4-41
4.5.10
Disabling the SCCs................................................................................4-42
4.5.11
UART Controller.....................................................................................4-43
4.5.11.1
Normal Asynchronous Mode..................................................................4-45
4.5.11.2
Asynchronous DDCMP MODE ..............................................................4-46
4.5.11.3
UART Memory Map ...............................................................................4-46
4.5.11.4
UART Programming Model....................................................................4-48
4.5.11.5
UART Command Set .............................................................................4-49
4.5.11.6
UART Address Recognition ...................................................................4-50
4.5.11.7
UART Control Characters and Flow Control..........................................4-51
4.5.11.8
Send Break ............................................................................................4-53
4.5.11.9
Send Preamble (IDLE)...........................................................................4-53
4.5.11.10
Wakeup Timer........................................................................................4-53
4.5.11.11
UART Error-Handling Procedure ...........................................................4-54
4.5.11.12
Fractional Stop Bits................................................................................4-55
4.5.11.13
UART Mode Register.............................................................................4-56
4.5.11.14
UART Receive Buffer Descriptor (Rx BD) .............................................4-57
4.5.11.15
UART Transmit Buffer Descriptor (Tx BD).............................................4-61
4.5.11.16
UART Event Register.............................................................................4-63
4.5.11.17
UART MASK Register............................................................................4-65
4.5.11.18
S-Records Programming Example ........................................................4-65
4.5.12
HDLC Controller.....................................................................................4-66


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