![]() |
Electronic Components Datasheet Search |
|
MC68302FC20 Datasheet(PDF) 75 Page - Motorola, Inc |
|
MC68302FC20 Datasheet(HTML) 75 Page - Motorola, Inc |
75 / 480 page ![]() System Integration Block (SIB) MOTOROLA MC68302 USER’S MANUAL 3-25 ET7—IRQ7 Edge-/Level-Triggered This bit is valid only in the dedicated mode. 0 = Level-triggered. An interrupt is made pending when IRQ7 is low. NOTE The M68000 always treats level 7 as an edge-sensitive interrupt. Normally, users should not select the level-triggered option. The level-triggered option is useful when it is desired to make the ne- gation of IRQ7 cause the IOUT2–IOUT0 pins to cease driving a level 7 interrupt request when the MC68302 is used in the dis- able CPU mode. This situation is as follows: For a slave-mode MC68302, when it is triggered by IRQ1, IRQ6, or IRQ7 to generate an interrupt, its interrupt controller will out- put the interrupt request on pins IOUT2–IOUT0 to another pro- cessor (MC68302, MC68020, etc.) For cases when the slave MC68302 does not generate a level 4 vector (i.e., the VGE bit is cleared), one must set the ET1, ET6, and ET7 bits to level-trig- gered and then negate the IRQ1, IRQ6, and IRQ7 lines external- ly in the interrupt handler code. If the ET1, ET6, and ET7 bits are set to edge-triggered and the VGE bit is clear, the IOUT2–IOUT0 pins will never be cleared. 1 = Edge-triggered. An interrupt is made pending when IRQ7 changes from one to zero (falling edge). ET6—IRQ6 Edge-/Level-Triggered This bit is valid only in the dedicated mode. 0 = Level-triggered. An interrupt is made pending when IRQ6 is low. NOTE While in disable CPU mode during the host processor interrupt acknowledge cycle for IRQ6, if IRQ6 is not continuously assert- ed, the interrupt controller will still provide the vector number (and DTACK) according to the IV6 bit. The IACK6 falling edge may be used externally to negate IRQ6. 1 = Edge-triggered. An interrupt is made pending when IRQ6 changes from one to zero (falling edge). ET1—IRQ1 Edge-/Level-Triggered This bit is valid only in the dedicated mode. 0 = Level-triggered. An interrupt is made pending when IRQ1 is low. |