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MC68302FC16 Datasheet(PDF) 51 Page - Motorola, Inc |
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MC68302FC16 Datasheet(HTML) 51 Page - Motorola, Inc |
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51 / 480 page  MOTOROLA MC68302 USER’S MANUAL 3-1 SECTION 3 SYSTEM INTEGRATION BLOCK (SIB) The MC68302 contains an extensive SIB that simplifies the job of both the hardware and software designer. It integrates the M68000 core with the most common peripherals used in an M68000-based system. The independent direct memory access (IDMA) controller re- lieves the hardware designer of the extra effort and board logic needed to connect an exter- nal DMA controller. The interrupt controller can be used in a dedicated mode to generate interrupt acknowledge signals without external logic. Also, the chip-select signals and their associated wait-state logic eliminate the need to generate chip-select signals externally. The three timers simplify control and improve reliability. These and other features in the SIB con- serve board space and cost while decreasing development time. The SIB includes the following functions: • IDMA Controller with Three Handshake Signals: DREQ, DACK, and DONE • Interrupt Controller with Two Modes of Operation • Parallel Input/Output (I/O) Ports, Some with Interrupt Capability • On-Chip 1152-Byte Dual-Port RAM • Three Timers Including a Software Watchdog Timer • Four Programmable Chip-Select Lines with Wait-State Generator Logic • On-Chip Clock Generator with Output Signal • System Control —System Status and Control Logic —Disable CPU Logic (M68000) —Bus Arbitration Logic with Low-Interrupt Latency Support —Hardware Watchdog for Monitoring Bus Activity —Low-Power (Standby) Modes —Freeze Control for Debugging • Clock Control —Adjustable CLKO Drive —Three-state RCLK1 and TCLK1 —Disable BRG1 • DRAM Refresh Controller |
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