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MC68302 Datasheet(PDF) 5 Page - Motorola, Inc

Part No. MC68302
Description  Integrated Multiprotocol Processor User’s Manual
Download  480 Pages
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MC68302 Datasheet(HTML) 5 Page - Motorola, Inc

 
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MOTOROLA
MC68302 USER’S MANUAL
v
TABLE OF CONTENTS
Paragraph
Title
Page
Number
Number
Section 1
General Description
1.1
Block Diagram......................................................................................... 1-1
1.2
Features .................................................................................................. 1-3
1.3
MC68302 System Architecture ............................................................... 1-4
1.4
NMSI Communications-Oriented Environment ....................................... 1-5
1.5
Basic Rate ISDN or Digital Voice/Data Terminal .................................... 1-6
Section 2
MC68000/MC68008 Core
2.1
Programming Model................................................................................ 2-1
2.2
Instruction Set Summary......................................................................... 2-3
2.3
Address Spaces ...................................................................................... 2-6
2.4
Exception Processing.............................................................................. 2-8
2.4.1
Exception Vectors ................................................................................... 2-8
2.4.2
Exception Stacking Order ....................................................................... 2-9
2.5
Interrupt Processing .............................................................................. 2-11
2.6
M68000 Signal Differences ................................................................... 2-11
2.7
MC68302 IMP Configuration Control .................................................... 2-12
2.8
MC68302 Memory Map......................................................................... 2-14
2.9
Event Registers..................................................................................... 2-19
Section 3
System Integration Block (SIB)
3.1
DMA Control............................................................................................ 3-2
3.1.1
Key Features........................................................................................... 3-2
3.1.2
IDMA Registers (Independent DMA Controller) ...................................... 3-3
3.1.2.1
Channel Mode Register (CMR)............................................................... 3-4
3.1.2.2
Source Address Pointer Register (SAPR)............................................... 3-6
3.1.2.3
Destination Address Pointer Register (DAPR)........................................ 3-6
3.1.2.4
Function Code Register (FCR)................................................................ 3-7
3.1.2.5
Byte Count Register (BCR) ..................................................................... 3-7
3.1.2.6
Channel Status Register (CSR) .............................................................. 3-7
3.1.3
Interface Signals ..................................................................................... 3-8
3.1.3.1
DREQ and DACK.................................................................................... 3-8
3.1.3.2
DONE...................................................................................................... 3-8
3.1.4
IDMA Operational Description................................................................. 3-9
3.1.4.1
Channel Initialization ............................................................................... 3-9
3.1.4.2
Data Transfer .......................................................................................... 3-9


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