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IW4052B Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part No. IW4052B
Description  Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
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IW4052B Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

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TECHNICAL DATA
103
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The IW4052B analog multiplexer/demultiplexer
is digitally
controlled analog switches having low ON impedance and very low
OFF leakage current. Control of analog signals up to 20V peak-to-
peak can be achieved by digital signal amplitudes of 4.5 to 20V (if VCC
- GND = 3V, a VCC - VEE of up to 13 V can be controlled; for VCC -
VEE level differences above 13V a VCC - GND of at least 4.5V is
required).
These multiplexer circuits dissipate extremely low quiescent power
over the full VCC -GND and VCC - VEE supply-voltage ranges,
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The IW4052 is a differential 4-channel multiplexer having two
binary control inputs. A and B, and an enable input. The two binary
input signals select 1 of 4 pairs of channels to turned on and connect
the analog inputs to the outputs.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of
1
µA at 18 V over full package-temperature range; 100 nA at 18 V
and 25
°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4052B
ORDERING INFORMATION
IW4052BN Plastic
IW4052BDW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Control Inputs
ON
Enable
Select
Channels
BA
LL
L
Y0
X0
LL
H
Y1
X1
LH
L
Y2
X2
LH
H
Y3
X3
HX
X
None
X = don’t care
LOGIC DIAGRAM
Double-Pole, 4-Position
Plus Common Off
PIN 16 =VCC
PIN 7 = VEE
PIN 8 = GND


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