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AK4951A Datasheet(PDF) 6 Page - Asahi Kasei Microsystems |
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AK4951A Datasheet(HTML) 6 Page - Asahi Kasei Microsystems |
6 / 105 page [AK4951A] 016001936-E-00 2016/03 - 6 - ■ Comparison Table to AK4951 1. Function Function AK4951 AK4951A PLL Mode (MCKI Frequency) 11.2896MHz, 12MHz, 12.288MHz, 13.5MHz, 24MHz, 27MHz 11.2896MHz, 12MHz, 12.288MHz, 13.5MHz, 16MHz, 24MHz, 27MHz Automatic Wind Noise Reduction Filter Voice peak detection mode: Auto Voice peak detection mode: Selectable 2. Register Setting 1) PLL Reference Clock Setting Mode 0 of the PLL mode setting was added from AK4951. Mode PLL3 bit PLL2 bit PLL1 bit PLL0 bit PLL Reference Clock Input Pin Input Frequency PLL Lock Time (max) 0 0 0 0 0 MCKI pin 16MHz 5ms 2 0 0 1 0 BICK pin 32fs 2ms 3 0 0 1 1 BICK pin 64fs 2ms 4 0 1 0 0 MCKI pin 11.2896MHz 5ms 5 0 1 0 1 MCKI pin 12.288MHz 5ms 6 0 1 1 0 MCKI pin 12MHz 5ms 7 0 1 1 1 MCKI pin 24MHz 5ms 12 1 1 0 0 MCKI pin 13.5MHz 5ms 13 1 1 0 1 MCKI pin 27MHz 5ms Others Others N/A 2) Automatic Wind Noise Reduction Filter VODETN bit was added from AK4951. Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 03H Signal Select 2 SPKG1 SPKG0 VODETN MICL INL1 INL0 INR1 INR0 VODETN: Voice Peak Detection Disable 0: Enable (default) 1: Disable When AHPF and VODETN bits = “1”, voice peak detection is disable. VODETN bit must be set when PMPFIL bit = “0”. 3) Device Information Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0 31H Device Information REV3 REV2 REV1 REV0 DVN3 DVN2 DVN1 DVN0 REV3-0: Device Revision ID (Read operation only.) 1100: AK4951 1101: AK4951A |
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