6

INDUSTRIAL

TEMPERATURE RANGE

IDT72V15160/16160/17160/18160/19160

- 3.3V 16-BIT V-III MULTIMEDIA FIFO

IDT72V14320/15320/16320/17320/18320/19320 - 3.3V 32-BIT VX-III MULTIMEDIA FIFO

PIN DESCRIPTION (32-BIT VX-III PBGA PACKAGE ONLY)

Symbol

Name

I/O

Description

JTAG Clock

I

Clock input for JTAG function. One of four terminals required by IEEE Standard 1149.1-1990. Test operations of the

device are synchronous to TCK. Data from TMS and TDI are sampled on the rising edge of TCK and outputs change

on the falling edge of TCK. If the JTAG function is not used this signal needs to be tied to GND.

JTAG Test Data

I

One of four terminals required by IEEE Standard 1149.1-1990. During the JTAG boundary scan operation, test data

Input

seriallyloadedviatheTDIontherisingedgeofTCKtoeithertheInstructionRegister,IDRegisterandBypassRegister.

An internal pull-up resistor forces TDI HIGH if left unconnected.

JTAG Test Data

O

One of four terminals required by IEEE Standard 1149.1-1990. During the JTAG boundary scan operation, test data

Output

seriallyloadedoutputviatheTDOonthefallingedgeofTCKfromeithertheInstructionRegister,IDRegisterandBypass

Register. This output is high impedance except when shifting, while in SHIFT-DR and SHIFT-IR controller states.

JTAG Mode Select

I

TMSisaserialinputpin.OneoffourterminalsrequiredbyIEEEStandard1149.1-1990.TMSdirectsthedevicethrough

its TAP controller states. An internal pull-up resistor forces TMS HIGH if left unconnected.

JTAG Reset

I

TRST is an asynchronous reset pin for the JTAG controller. The JTAG TAP controller does not automatically reset

upon power-up, thus it must be reset by either this signal or by setting TMS= HIGH for five TCK cycles. If the TAP

controller is not properly reset then the FIFO outputs will always be in high-impedance. If the JTAG function is used

but the user does not want to use

TRST, then TRST can be tied with MRS to ensure proper FIFO operation. If the

JTAG function is not used then this signal needs to be tied to GND. An internal pull-up resistor forces

TRST HIGH if

leftunconnected.

NOTE:

1. These pins are for the JTAG port. Please refer to pages 15-19 and Figures 2-4.