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LMV7219M7 Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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LMV7219M7 Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 12 page Application Section (Continued) This method is recommended for additional hysteresis of up to a few hundred millivolts. Beyond that, the impedance of R3 is low enough to affect the bias string and adjustment of R1 may be also required. Circuit Layout and Bypassing The LMV7219 requires high-speed layout. Follow these lay- out guidelines: 1. Power supply bypassing is critical, and will improve stabil- ity and transient response. A decoupling capacitor such as 0.1µF ceramic should be placed as close as possible to V + pin. An additional 2.2µF tantalum capacitor may be required for extra noise reduction. 2. Keep all leads short to reduce stray capacitance and lead inductance. It will also minimize unwanted parasitic feedback around the comparator. 3. The device should be soldered directly to the PC board in- stead of using a socket. 4. Use a PC board with a good, unbroken low inductance ground plane. Make sure ground paths are low-impedance, especially were heavier currents are flowing. 5. Input traces should be kept away from output traces. This can be achieved by running a topside ground plane between the output and inputs. 6. Run the ground trace under the device up to the bypass capacitor to shield the inputs from the outputs. 7. To prevent parasitic feedback when input signals are slow-moving, a small capacitor of 1000pF or less can be placed between the inputs. It can also help eliminate oscilla- tions in the transition region. However, this capacitor can cause some degradation to tpd when the source impedance is low. Zero-Crossing Detector The inverting input is connected to ground and the non- inverting input is connected to 100mVp-p signal. As the sig- nal at the non-inverting input crosses 0V, the comparator’s output Changes State. Threshold Detector Instead of tying the inverting input to 0V, the inverting input can be tied to a reference voltage. The non-inverting input is connected to the input. As the input passes the V REF thresh- old, the comparator’s output changes state. Crystal Oscillator A simple crystal oscillator using the LMV7219 is shown be- low. Resistors R1 and R2 set the bias point at the compara- tor’s non-inverting input. Resistors R3, R4 and C1 sets the inverting input node at an appropriate DC average level based on the output. The crystal’s path provides resonant positive feedback and stable oscillation occurs. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor tolerances and to a lesser extent by the comparator offset. DS101054-21 FIGURE 2. Additional Hysteresis DS101054-22 FIGURE 3. Zero-Crossing Detector DS101054-23 FIGURE 4. Threshold Detector DS101054-24 FIGURE 5. Crystal Oscillator www.national.com 9 |
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