Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

CS7808-CM Datasheet(PDF) 34 Page - Cirrus Logic

Part No. CS7808-CM
Description  MULTI PURPOSE AUDIO/VIDEO EMBEDDED PROCESSOR
Download  52 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo 

CS7808-CM Datasheet(HTML) 34 Page - Cirrus Logic

Zoom Inzoom in Zoom Outzoom out
 34 / 52 page
background image
CS7808
34
6.1
Pin Assignments
Table 16 lists the pin number, pin name, and pin type for the 208 pin CS7808 package. The primary func-
tion and pin direction is shown for all signal pins. For some signal pins, a secondary function and direction
are also shown. For pins having more than one function, the primary function is chosen when the chip is
reset.
Pin
Name
Type
Primary Function
Dir
Secondary Function
Dir
Note
1
VDD_PLL
Pwr
PLL Power 2.5V
I
2
M_A_11
O8
SDRAM Address[11]
O
ROM/NVRAM Address[11]
O
3
M_A_10
O8
SDRAM Address[10]
O
ROM/NVRAM Address[10]
O
4
GPIO_D18
B4U
GenIOD[18]
B
System Clock PLL Bypass
I
5
M_A_9
O8
SDRAM Address[9]
O
ROM/NVRAM Address[9]
O
6
M_A_8
O8
SDRAM Address[8]
O
ROM/NVRAM Address8]
O
7
M_A_7
O8
SDRAM Address[7]
O
ROM/NVRAM Address[7]
O
8
GPIO_D16
B4SU
GenIOD[16]
B
9
M_A_6
O8
SDRAM Address[6]
O
ROM/NVRAM Address[6]
O
10
M_A_5
O8
SDRAM Address[5]
O
ROM/NVRAM Address[5]
O
11
M_A_4
O8
SDRAM Address[4]
O
ROM/NVRAM Address[4]
O
12
GPIO_D17
B4U
GenIOD[17]
B
13
M_A_3
O8
SDRAM Address[3]
O
ROM/NVRAM Address[3]
O
14
M_A_2
O8
SDRAM Address[2]
O
ROM/NVRAM Address[2]
O
15
M_A_1
O8
SDRAM Address[1]
O
ROM/NVRAM Address[1]
O
16
M_A_0
O8
SDRAM Address[0]
O
ROM/NVRAM Address[0]
O
17
GPIO_D19
B4U
GenIOD[19]
B
Memory Clock PLL Bypass
I
18
VSS_IO
Gnd
I/O Ground
I
19
M_CKO
O8
SDRAM Clock
O
20
VDD_IO
Pwr
I/O Power 3.3V
I
21
M_BS_N
O8
SDRAM Bank Select
O
22
M_CKE
B8
SDRAM Clock Enable
O
GenioMis(7)
B
3
23
M_AP
O8
SDRAM Auto Pre-charge
O
24
M_RAS_N
O8
SDRAM Row Strobe
O
25
M_CAS_N
O8
SDRAM Column Strobe
O
26
GPIO_D20
B4U
GenIOD[20]
B
27
M_WE_N
O8
SDRAM Write Enable
O
28
M_DQM_0
O8
SDRAM DQM[0]
O
29
M_DQM_1
O8
SDRAM DQM[1]
O
30
GPIO_D0
B4U
GenIOD[0]
B
31
M_DQM_2
O8
SDRAM DQM[2]
O
32
M_DQM_3
O8
SDRAM DQM[3]
O
33
M_D_8
B8U
SDRAM Data[8]
B
ROM/NVRAM Data[8]
B
34
GPIO_D1
B4U
GenIOD[1]
B
Table 16. 208-Pin Package Assignments


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn