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CS7808-CM Datasheet(PDF) 27 Page - Cirrus Logic |
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CS7808-CM Datasheet(HTML) 27 Page - Cirrus Logic |
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27 CS7808 114 RO Host Read_Data_Port 120 R/W Host Host_Start_Address 124 R/W Host DRAM Start Address 128 R/W Host Stream_Transfer_Size 12C R/W Host DRAM_Burst_Threshold 13C R/W Host Host_Master_Control 200 R/W DRAM controller DRAM_Controller_Priority0 204 R/W DRAM controller DRAM_Controller_Priority1 208 R/W DRAM controller DRAM_Controller_Priority2 20C R/W DRAM controller DRAM_Controller_Priority3 210 R/W DRAM controller DRAM_Controller_Priority4 214 R/W DRAM controller DRAM_Controller_Setup 218 R/W DRAM controller DRAM_Command 21C R/W DRAM controller DRAM_Controller_Mb_Width 220 R/W DRAM controller DRAM_Controller_Debug_Control 224 RO DRAM controller DRAM_Debug_Status 300 WO DMA DMA_Enable 304 R/W DMA DMA_Control 308 RO DMA DMA_Status 30C R/W DMA Xfer_Byte_Cnt 310 R/W DMA Dram_Byte_Start_Addr 314 R/W DMA Sram_Byte_Start_Addr 318 R/W DMA Fifo_Start_Rd_Addr 31C R/W DMA Fifo_Start_Wr_Addr 328 R/W DMA Search_Control 32C RO DMA Search_Status 330 R/W DMA Fifo_End_Rd_Addr 334 R/W DMA Fifo_End_Wr_Addr 338 R/W DMA Lines_and_Skip 33C R/W DMA Byte_Mask_Pattern 540 R/W SER/DCI Serial_Frame_Sync_Control 544 R/W SER/DCI Serial_Output_Input_Control 548 R/W SER/DCI AC97_Codec_Control 54C R/W SER/DCI AC97_Codec_Command 550 R/W SER/DCI Serial_Output_Fifo_Start_Address 554 R/W SER/DCI Serial_Output_Fifo_End_Address 558 R/W SER/DCI Serial_Input_Fifo_Start_Address 55C R/W SER/DCI Serial_Input_Fifo_End_Address 560 RO SER/DCI Serial_Output_Fifo_Read_Address 564 RO SER/DCI Serial_Input_Fifo_Write_Address Address Type Function Register Name Table 14. CS7808 Registers (Continued) |
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