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AKD4383 Datasheet(PDF) 7 Page - Asahi Kasei Microsystems |
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AKD4383 Datasheet(HTML) 7 Page - Asahi Kasei Microsystems |
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7 / 25 page  ASAHI KASEI [AK4383] MS0090-E-00 2001/4 - 7 - SWITCHING CHARACTERISTICS (Ta = 25 °C; VDD = 4.75 ∼ 5.25V; C L = 20pF) Parameter Symbol min typ max Units Master Clock Frequency Duty Cycle fCLK dCLK 2.048 40 11.2896 36.864 60 MHz % LRCK Frequency Normal Speed Mode Double Speed Mode Quad Speed Mode Duty Cycle fsn fsd fsq Duty 8 60 120 45 48 96 192 55 kHz kHz kHz % PCM Audio Interface Timing BICK Period Normal Speed Mode Double/Quad Speed Mode BICK Pulse Width Low Pulse Width High BICK “ ↑” to LRCK Edge (Note 13) LRCK Edge to BICK “ ↑” (Note 13) SDTI Hold Time SDTI Setup Time tBCK tBCK tBCKL tBCKH tBLR tLRB tSDH tSDS 1/128fs 1/64fs 30 30 20 20 20 20 ns ns ns ns ns ns ns ns DSD Audio Interface Timing DCLK Period DCLK Pulse Width Low Pulse Width High DCLK Edge to DSDL/R (Note 14) tDCK tDCKL tDCKH tDDD 1/64fs 160 160 -20 20 ns ns ns ns Control Interface Timing CCLK Period CCLK Pulse Width Low Pulse Width High CDTI Setup Time CDTI Hold Time CSN High Time CSN “ ↓” to CCLK “↑” CCLK “ ↑” to CSN “↑” tCCK tCCKL tCCKH tCDS tCDH tCSW tCSS tCSH 200 80 80 40 40 150 50 50 ns ns ns ns ns ns ns ns Reset Timing PDN Pulse Width (Note 15) tPD 150 ns Notes: 13. BICK rising edge must not occur at the same time as LRCK edge. 14. DSD data transmitting device must meet this time. 15. The AK4383 can be reset by bringing PDN= “L”. |
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