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ADS8402 Datasheet(PDF) 3 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation.
Part No. ADS8402
Description  16-BIT, 1.25 MSPS, UNIPOLAR DIFFERENTIAL INPUT, MICRO POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE AND REFERENCE
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Maker  BURR-BROWN [Burr-Brown (TI)]
Homepage  http://www.burr-brown.com
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ADS8402 Datasheet(HTML) 3 Page - Burr-Brown (TI)

 
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ADS8402
SLAS154B – DECEMBER 2002 – REVISED MAY 2003
www.ti.com
3
SPECIFICATIONS
TA = –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 1.25 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog Input
Full-scale input voltage (see Note 1)
+IN – –IN
–Vref
Vref
V
Absolute input voltage
+IN
–0.2
Vref + 0.2
V
Absolute input voltage
–IN
–0.2
Vref + 0.2
V
Common-mode input range
ADS8402I
(Vref/2) – 0.2
Vref/2
(Vref/2) + 0.2
V
Input capacitance
25
pF
Input leakage current
0.5
nA
SystemPerformance
Resolution
16
Bits
No missing codes
ADS8402I
15
Bits
No missing codes
ADS8402IB
16
Bits
Integral linearity (see Notes 2 and 3)
ADS8402I
–6
±2.5
6
LSB
Integral linearity (see Notes 2 and 3)
ADS8402IB
–3.5
±2
3.5
LSB
Differentiallinearity
ADS8402I
–2
±1
3
LSB
Differentiallinearity
ADS8402IB
–1
±0.75
2
LSB
Offset error (see Note 4)
ADS8402I
–3
±1
3
mV
Offset error (see Note 4)
ADS8402IB
–1.5
±0.5
1.5
mV
Gain error (see Notes 4 and 5)
ADS8402I
–0.15
0.15
%FS
Gain error (see Notes 4 and 5)
ADS8402IB
–0.098
0.098
%FS
Common mode rejection ratio
At dc (
±0.2 V around Vref/2)
80
dB
Common-mode rejection ratio
+IN – –IN = 1 Vpp at 1 MHz
80
dB
Noise
60
µV RMS
DC Power supply rejection ratio
At 7FFFh output code,
+VA = 4.75 V to 5.25 V,
Vref = 4.096 V, See Note 4
1
LSB
SamplingDynamics
Conversion time
610
ns
Acquisition time
150
ns
Throughput rate
1.25
MHz
Aperture delay
2
ns
Aperture jitter
25
ps
Step response
100
ns
Overvoltage recovery
100
ns
(1) Ideal input span, does not include gain or offset error.
(2) LSB means least significant bit
(3) This is endpoint INL, not best fit
(4) Measured relative to an ideal full-scale input (+IN – –IN) of 8.192 V
(5) This specification does not include the internal reference voltage error and drift.


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