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LMF380C1J Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LMF380C1J Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 12 page Applications Information POWER SUPPLIES The LMF380 can operate from a total supply voltage (Va b Vb) ranging from 40V up to 14V but the choice of supply voltage can affect circuit performance The IC depends on MOS switches for its operation All such switches have in- herent ‘‘ON’’ resistances which can cause small delays in charging internal capacitances Increasing the supply volt- age reduces this ‘‘ON’’ resistance which improves the ac- curacy of the filter in high-frequency applications The maxi- mum practical center frequency improves by roughly 10% to 20% when the supply voltage increases from 5V to 10V Dynamic range is also affected by supply voltage The maxi- mum signal voltage swing capability increases as supply voltage increases so the dynamic range is greater with higher power supply voltages It is therefore recommended that the supply voltage be kept near the maximum operating voltage when dynamic range andor high-frequency per- formance are important As with all switched-capacitor filters each of the LMF380’s power supply pins should be bypassed with a minimum of 01 mF located close to the chip An additional 1 mFto 10 mF tantalum capacitor on each supply pin is recommend- ed for best results Sampled-Data System Considerations CLOCK CIRCUITRY The LMF380’s clock input circuitry accepts an external CMOS-level clock signal at XTAL1 or can serve as a self- contained oscillator with the addition of an external 1 MHz crystal and two 30 pF capacitors (see Figure 3 ) The Clock Output pin provides a clock signal whose fre- quency is one-half that of the clock signal at XTAL1 This allows multiple LMF380s to operate from a single internal or external clock oscillator CLOCK FREQUENCY LIMITATIONS The performance characteristics of a switched-capacitor fil- ter depend on the switching (clock) frequency At very low clock frequencies (below 10 Hz) the time between clock cycles is relatively long and small parasitic leakage currents cause the internal capacitors to discharge sufficiently to af- fect the filter’s offset voltage and gain This effect becomes more pronounced at elevated operating temperatures At higher clock frequencies performance deviations are due primarily to the reduced time available for the internal operational amplifiers to settle For this reason when the filter clock is externally generated care should be taken to ensure that the clock waveform’s duty cycle is as close to 50% as possible especially at high clock frequencies OUTPUT STEPS Because the LMF380 uses switched-capacitor techniques its performance differs in several ways from non-sampled (continuous) circuits The analog signal at any input is sam- pled during each filter clock cycle and since the output volt- age can change only once every clock cycle the result is a discontinuous output signal The output signal takes the form of a series of voltage ‘‘steps’’ as shown in Figure 2 for clock-to-center-frequency ratios of 501 and 1001 TLH11123 – 8 FIGURE 2 Switched-Capacitor Filter Output Waveform Note the sampling ‘‘steps’’ ALIASING Another important characteristic of sampled-data systems is their effect on signals at frequencies greater than one-half the sampling frequency fS (The LMF380’s sampling fre- quency is the same as the filter clock frequency) If a signal with a frequency greater than one-half the sampling fre- quency is applied to the input of a sampled-data system it will be ‘‘reflected’’ to a frequency less than one-half the sampling frequency Thus an input signal whose frequency is fS 2 a 10 Hz will cause the system to respond as though the input frequency was fS 2 b 10 Hz If this frequency happens to be within the passband of the filter it will appear at the filter’s output even though it was not present in the input signal This phenomenon is known as ‘‘aliasing’’ Ali- asing can be reduced or eliminated by limiting the input sig- nal spectrum to less than fS 2 In some cases it may be necessary to use a bandwidth-limiting filter (often a simple passive RC low-pass) between the signal source and the switched-capacitor filter’s input In the application example shown in Figure 3 two LMF60 6th-order low-pass filters pro- vide anti-aliasing filtering OFFSET VOLTAGE Switched-capacitor filters often have higher offset voltages than non-sampling filters with similar topologies This is due to charge injection from the MOS switches into the sampling and integrating capacitors The LMF380’s offset voltage ranges from a minimum of b30 mV to a maximum of a 120 mV NOISE Switched-capacitor filters have two kinds of noise at their outputs There is a random ‘‘thermal’’ noise component whose amplitude is typically on the order of 210 mV The other kind of noise is digital clock feedthrough This will have an amplitude in the vicinity of 10 mV peak-to-peak In some applications the clock noise frequency is so high compared to the signal frequency that it is unimportant In other cases clock noise may have to be removed from the output signal with for example a passive low-pass filter at the LMF380’s output (see Figure 4 ) INPUT IMPEDANCE The LMF380’s input pins are connected directly to the inter- nal biquad filter sections The input impedance is purely ca- pacitive and is approximately 62 pF at each input pin in- cluding package parasitics 6 |
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