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LMF60 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LMF60 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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Op Amp Electrical Characteristics Boldface limits apply for TA e TJ e TMIN to TMAX all other limits TA e TJ e 25 C Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) V a ea 5V V b eb 5V VOS Input Offset Voltage g 20 mV (Max) IB Input Bias Current 10 pA CMRR Common Mode Rejection Test Input Range e 55 dB Ratio (Op Amp 2 Only) b 22V to a18V VO Output Voltage Swing RL e 5kX 38 36 V (Min) b 42 b 40 V (Max) ISC Output Short Circuit Source 90 mA Current (Note 13) Sink 21 mA SR Slew Rate 4 V ms AVOL DC Open Loop Gain 80 dB (Min) GBW Gain Bandwidth Product 20 MHz V a ea 25V V b eb 25V VOS Input Offset Voltage g 20 mV (Max) IB Input Bias Current 10 pA CMRR Common Mode Rejection Test Input Range e 55 dB Ratio (Op Amp 2 Only) b 09V to a05V VO Output Voltage Swing RL e 5kX 13 11 V (Min) b 18 b 16 V (Max) ISC Output Short Circuit Source 42 mA Current (Note 13) Sink 09 mA SR Slew Rate 3 V ms AVOL DC Open Loop Gain 74 dB (Min) GBW Gain Bandwidth Product 20 MHz Logic Input-Output Characteristics The following specifications apply for Vb e 0V (Note 15) LSh e 0V unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits TA e TJ e 25 C Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) TTL CLOCK INPUT CLK R PIN (NOTE 14) VIH TTL Input Logical ‘‘1’’ V a ea 5V V b eb 5V 20 V (Min) VIL Voltage Logical ‘‘0’’ 08 V (Max) VIH CLK R Input Logical ‘‘1’’ V a ea 25V V b eb 25V 20 V (Min) VIL Voltage Logical ‘‘0’’ 06 04 V (Max) Maximum Leakage 20 m A Current at CLK R http www nationalcom 4 |
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