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IHLP4040DZER1R0 Datasheet(PDF) 4 Page - Vishay Siliconix

Part # IHLP4040DZER1R0
Description  Selectable frequency from 200 kHz to 1 MHz with an external resistor
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Manufacturer  VISHAY [Vishay Siliconix]
Direct Link  http://www.vishay.com
Logo VISHAY - Vishay Siliconix

IHLP4040DZER1R0 Datasheet(HTML) 4 Page - Vishay Siliconix

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SiC401, SiC402, SiC403
www.vishay.com
Vishay Siliconix
Revision: 17-Nov-14
4
Document Number: 62923
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
The UVLO will be activated if the voltage present at this pin
is below 2.6 V. This can be set using the following equation.
If under voltage is not a consideration then this can be
connected to VIN. The divider values for this pin can be set
using the following equation:
SOFT START SETTING
Soft start is a useful function helping to limit the current draw
from the source at switch on. This is simply set with a
ceramic capacitor using the following equation:
A 2. 2 nF capacitor will provide ~ 1 ms soft start time.
BOOTSTRAP CIRCUIT
A bootstrap capacitor of 100 nF will be sufficient for this
circuit with switching frequencies from 200 kHz to 500 kHz.
A series resistor has been added in order to slow down the
low side switch in and minimize overshoot without adding a
snubber. This is user adjustable.
VDD DECOUPLING
The VDD pin will need to be decoupled in order to provide a
stable voltage internally and externally. The value for this
capacitor is recommended as
≥ 1 μF.
CURRENT LIMIT RESISTOR
The current limit is set by placing a resistor between pins
LXS and ILIM. The values can be found using the following
equations.
SiC401:
SiC402:
SiC403:
OUTPUT CAPACITANCE
The output capacitance will be determined by the ripple
voltage requirement. Voltage mode COT topology can work
with very small values of capacitor ESR however a ripple
injection network will also be required for stable operation.
The overall capacitance needs to be calculated next. The
following equations are used to calculate the size needed to
meet a transient load response:
Where ILPK is the peak inductor current, IMAX. is the
maximum output current, dILOAD is the current step in μF
and VPK is the peak voltage, the output voltage summed
with the specified over and under shoot.
INPUT CAPACITANCE
In order to keep the design compact and minimize parasitic
elements, ceramic capacitors will be chosen. The initial
requirement for the input capacitance is decided by the
maximum input voltage, 16 V in this case however a 35 V
rated capacitor will be chosen of the X7R variety. The
footprint will be a compact 1206.
In order to determine the minimum capacitance the input
voltage ripple needs to be specified; VCINPP
≤ 150 mV is a
suitable starting point. This magnitude is determined by the
final application specification. The input current needs to be
determined for the lowest operating input voltage:
The minimum input capacitance can then be found,
HIGH OUTPUT VOLTAGE OPERATION
For the SiC40X family the recommended maximum output
voltage of no more than 75 % of VIN.
For applications where an output voltage greater than 5 V is
required a resistive network should be used to step down
the output voltage in order to provide the VOUT pin with
4.5 V.
For example, if an output voltage of VOUT = 8.5 V is
required, setting R2 = 10 k
Ω and VOUT PIN = 4.5 V results in
R1 = 8870
Ω.
The switching frequency will also need recalculating using a
VOUT PIN magnitude of 4.5 V.
Fig. 1 - Resistor Divider Network Allows 4.5 V at the VOUT PIN
V
ENL =
V
IN x R9
R
1 + R9
----------------------
C
SS =
t
SS
500 000
---------------------
R
ILIM = 792 x ILIM x
0.101 x 5 V - V
DD
() + 1
[]
R
ILIM = 446 x ILIM x
0.099 x 5 V - V
DD
() + 1
[]
R
ILIM = 1176 x ILIM x
0.112 x 5 V - V
DD
() + 1
[]
I
LPK = IMAX. + 0.5 x IRIPPLE MAX,
C
OUT MIN. = ILPK x
L x
I
LPK
V
OUT
-------------- -
I
MAX.
dI
LOAD
------------------ x dt
2 x V
PK - VOUT
()
--------------------------------------------------------------
I
CIN(RMS) =
I
OUT
V
IN
------------ x
V
OUT x
V
IN - VOUT
()
C
IN MIN. = IOUT x
DC - 1 - DC
()
V
CINPP x FSW
--------------------------------------
R
1 =
R
2 x
V
OUT - VOUT PIN
()
V
OUT PIN
-------------------------------------------------------------
F
SW =
V
OUT PIN
t
ON x VIN
-------------------------
SiC40X
COUT
VOUT
VOUT PIN
LX
R1
R2


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