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CRCW0402100KFKED Datasheet(PDF) 2 Page - Vishay Siliconix |
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CRCW0402100KFKED Datasheet(HTML) 2 Page - Vishay Siliconix |
2 / 10 page SiC401, SiC402, SiC403 www.vishay.com Vishay Siliconix Revision: 17-Nov-14 2 Document Number: 62923 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SPECIFICATIONS This reference board allows the end user to evaluate the SiC401, SiC402, or the SiC403 chip for its features and all functionalities. It can also be a reference design for a user’s application. CONNECTION AND SIGNAL / TEST POINTS Power Sockets VIN, GND (P1): Input voltage source with VIN to be positive. Connect to a voltage source: - SiC401A/BCD - 3 V to 17 V - SiC402A/BCD - 3 V to 28 V - SiC403A/BCD - 3 V to 28 V VOUT, GND (P3): Output voltage with VOUT to be positive. Connect to a load that draws no more than: • SiC401A/BCD - 15 A • SiC402A/BCD - 10 A • SiC403A/BCD - 6 A 5 V, GND (P5): External 5 V voltage source with 5 V to be positive. Connect to a 5 V source when this option is selected. SELECTION JUMPERS Mode Select P7: This is a 2 way header which allows the user to select either power save mode or constant PWM mode. OPEN - forced PWM, the pin is floating SHORT - power save mode, the pin is at 5 V A third option is available whereby pin 2 is shorted to 0 V to disable the part. UVLO Option P8: This is a 2 way header that will enable the UVLO function when selected. The divider resistors R1 and R2 can be changed depending on the required turn on voltage level, the pin requires a voltage greater than 3 V to enable. OPEN - UVLO disabled SHORT - UVLO enabled VDD Select P6: This is a 3 way header that will enable the user to select between internal LDO and an external 5 V supply. Position 1 - SHORT PIN 1-2 - internal LDO Position 2 - SHORT PIN 2-3 - external 5 V SIGNALS AND TEST LEADS Input Voltage Sense VIN_SENSE, GNDIN_SENSE (P2): This allows the user to measure the voltage at the input of the regulator and remove any losses generated due to the, connections from the measurement. This can also be used by a power source with sense capability. Output Voltage Sense VOUT_SENSE, GNDOUT_SENSE (P4): This allows the user to measure the voltage at the output of the regulator and remove any losses generated due to the connections, from the measurement. This can also be used by an active load with sense capability. PGD (P9): Is an open drain output and is pulled up with a 10 k Ω resistor to VIN. When FB or VOUT are within -10 % to +20 % percent of the set voltage this pin will go HI to indicate the output is okay. The pin will also follow EN/PSV condition switching LO if the IC is disabled. POWER UP PROCEDURE To turn-on the reference board, apply 12 V to VIN with the P6 jumper is in Position 1. If the P7 jumper is in place the board will come up in power save mode, if not in place then constant PWM will be observed. When applying higher than 12 V to the input it is reasonable to install a RC snubber from LX to GND. There are place holders on the reference board R9 and C11 for the snubber. Values of 10 Ω and 1 nF are a reasonable starting point. ADJUSTMENTS TO THE REFERENCE BOARD OUTPUT VOLTAGE ADJUSTMENT If a different output voltage is needed, simply change the value of VOUT and solve for R12 based on the following formula: Where VFB is 0.6 V for the SiC40X. CHANGING SWITCHING FREQUENCY The following equation illustrates the relationship between ON-time, VIN, VOUT, and RON value: Where k equals 1 when VDD is greater than 3.6 V. When k is less than 3.6 V and VIN is greater than ((VDD - 1.75 V) x 10), k is shown by the following equation: The maximum Rton value allowed is shown: R 12 = R13 x V OUT - VFB V FB ----------------------------- R tON = k 25 pF x F SW --------------------------------- k = V DD - 1.75 V () x 10 V IN ---------------------------------------------------- R tON MAX. = V IN min. 15 μA ------------------ |
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