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CY7C43642-7AC Datasheet(PDF) 9 Page - Cypress Semiconductor

Part # CY7C43642-7AC
Description  1K/4K/16K x36 x2 Bidirectional Synchronous FIFO
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C43642-7AC Datasheet(HTML) 9 Page - Cypress Semiconductor

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CY7C43642
CY7C43662
CY7C43682
Document #: 38-06019 Rev. *B
Page 9 of 30
L
H
H
L
In high-impedance state
FIFO1 write
L
H
H
H
In high-impedance state
Mail1 write
L
L
L
L
X
Active, FIFO2 output register
None
L
L
H
L
Active, FIFO2 output register
FIFO2 read
L
L
L
H
X
Active, Mail2 register
None
L
L
H
H
Active, Mail2 register
Mail2 read (set MBF2 HIGH)
Table 3. Port B Enable Function
CSB
W/RB
ENB
MBB
CLKB
B0–35 Outputs
Port Function
H
X
X
X
X
In high-impedance state
None
L
L
L
X
X
In high-impedance state
None
L
L
H
L
In high-impedance state
FIFO2 write
L
L
H
H
In high-impedance state
Mail2 write
L
H
L
L
X
Active, FIFO1 output register
None
L
H
H
L
Active, FIFO1 output register
FIFO1 read
L
H
L
H
X
Active, Mail1 register
None
L
H
H
H
Active, Mail1 register
Mail1 read (set MBF1 HIGH)
Table 4. FIFO1 Flag Operation (CY Standard and FWFT modes)[2]
Number of Words in FIFO Memory[5, 6, 7, 8]
Synchronized to CLKB
Synchronized to CLKA
CY7C43642
CY7C43662
CY7C43682
EFB/ORB
AEB
AFA
FFA/IRA
0
0
0
L
L
H
H
1 TO X1
1 TO X1
1 TO X1
H
L
H
H
(X1+1) to
[1024–(Y1+1)]
(X1+1) to
[4096–(Y1+1)]
(X1+1) to
[16384–(Y1+1)]
H
H
H
H
(1024–Y1) to 1023
(4096–Y1) to 4095
(16384–Y1) to 16383
H
H
L
H
1024
4096
16384
H
H
L
L
Table 2. Port A Enable Function (continued)
Table 5. FIFO2 Flag Operation (CY Standard and FWFT modes)[2]
Number of Words in FIFO Memory[6, 7, 8, 9]
Synchronized to CLKA
Synchronized to CLKB
CY7C43642
CY7C43662
CY7C43682
EFA/ORA
AEA
AFB
FFB/IRB
00
0
L
L
H
H
1 TO X2
1 TO X2
1 TO X2
H
L
H
H
(X2+1) to
[1024–(Y2+1)]
(X2+1) to
[4096–(Y2+1)]
(X2+1) to
[16384–(Y2+)1]
HH
HH
(1024–Y2) to 1023
(4096–Y2) to 4095
(16384–Y2) to 16383
H
H
L
H
1024
4096
16384
H
H
L
L
Notes:
3.
X1 register holds the offset for AEB; Y1 register holds the offset for AFA.
4.
X2 register holds the offset for AEA; Y2 register holds the offset for AFB.
5.
X1 is the Almost Empty offset for FIFO1 used by AEB. Y1 is the Almost Full offset for FIFO1 used by AFA. Both X1 and Y1 are selected during a FIFO1 reset
or port A programming.
6.
When a word loaded to an empty FIFO is shifted to the output register, its previous FIFO memory location is free.
7.
Data in the output register does not count as a “word in FIFO memory.” Since in FWFT mode, the first word written to an empty FIFO goes unrequested to the
output register (no read operation necessary), it is not included in the FIFO memory count.
8.
The ORA and IRB functions are active during FWFT mode; the EFA and FFB functions are active in CY Standard Mode.
9.
X2 is the Almost Empty offset for FIFO2 used by AEA. Y2 is the Almost Full offset for FIFO2 used by AFB. Both X2 and Y2 are selected during a FIFO2 reset
or port A programming.


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