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LMC662CM Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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LMC662CM Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 13 page Typical Performance Characteristics V S = ±7.5V, TA = 25˚C unless otherwise specified (Continued) Application Hints AMPLIFIER TOPOLOGY The topology chosen for the LMC662, shown in Figure 1,is unconventional (compared to general-purpose op amps) in that the traditional unity-gain buffer output stage is not used; instead, the output is taken directly from the output of the in- tegrator, to allow rail-to-rail output swing. Since the buffer traditionally delivers the power to the load, while maintaining high op amp gain and stability, and must withstand shorts to either rail, these tasks now fall to the integrator. As a result of these demands, the integrator is a compound affair with an embedded gain stage that is doubly fed forward (via C f and Cff) by a dedicated unity-gain compensation driver. In addition, the output portion of the integrator is a push-pull configuration for delivering heavy loads. While sinking current the whole amplifier path consists of three gain stages with one stage fed forward, whereas while sourcing the path contains four gain stages with two fed forward. The large signal voltage gain while sourcing is comparable to traditional bipolar op amps, even with a 600 Ω load. The gain while sinking is higher than most CMOS op amps, due to the additional gain stage; however, under heavy load (600 Ω) the gain will be reduced as indicated in the Electrical Characteristics. CMRR vs Frequency DS009763-30 Open-Loop Frequency Response DS009763-31 Frequency Response vs Capacitive Load DS009763-32 Non-Inverting Large Signal Pulse Response DS009763-33 Stability vs Capacitive Load DS009763-34 Note: Avoid resistive loads of less than 500 Ω, as they may cause instability. Stability vs Capacitive Load DS009763-35 Note: Avoid resistive loads of less than 500 Ω, as they may cause instability. DS009763-4 FIGURE 1. LMC662 Circuit Topology (Each Amplifier) www.national.com 5 |
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