SiC632, SiC632A

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Vishay Siliconix

S15-2801-Rev. A, 30-Nov-15

11

Document Number: 62992

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

PCB LAYOUT RECOMMENDATIONS

decoupling effect

3. Difference values / packages of ceramic capacitors

should be used to cover entire decoupling spectrum e.g.

1210, 0805, 0603 and 0402

- better high frequency noise absorbing

1. Connect output inductor to DrMOS with large plane to

lower the resistance

2. If

any

snubber

network

is

required,

place

the

components as shown above and the network can be

placed at bottom

very close to IC. It is recommended to connect two caps

separately.

driver IC) and pin 29 to provide maximum instantaneous

driver current for low-side MOSFET during switching

cycle

to use large plane to reduce parasitic inductance.

Step 4: BOOT Resistor and Capacitor Placement

1. These components need to be placed very close to IC,

right between PHASE (pin 7) and BOOT (pin 5).

2. To reduce parasitic inductance, chip size 0402 can be

used.

PGND Plane

VSWH

C

GND

P

G

N

D

Cboot

Rboot