LMC2626 datasheet(3/6 Pages) NSC

Part #	LMC2626

Description	CMOS LDOR/Buffer Chip for Row Inversion Flat Panel Display Systems

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Manufacturer	NSC [National Semiconductor (TI)]

Direct Link	http://www.national.com

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DC Electrical Characteristics

Unless otherwise specified all limits guaranteed for b20 C s TA s a85 C P5V e 5V and 45V s VIN s 55V VREF e 1227V

SYNC(OPEN) SD(OPEN) k P5V e VIN e 5V (Continued)

Buffer

Symbol

Parameter

Conditions

Min

Typ

Max

Units

(Note 9)

VOUT

Peak to Peak Output

SYNC e 5Vpp

4997

4999

V

Voltage Swing or VOUT

(no load)

VOL

Low Level Output

SYNC e 0V

02

2

mV

Voltage

(No Load)

VOH

High Level Output

SYNC e 5V

4999

V

Voltage

(No Load)

DVOUT

Variation of VOUT

02

1

3

mV

Over Temperature

VIH

High Level Input

35

5

V

SYNC SD

Voltage

VIL

Low Level Input

0

15

V

SYNC SD

Voltage

IIL(SYNC)

Low Level Input

SYNC e 0V

50

42

1000

nA

Current for SYNC

IIH(SYNC)

High Level Input

SYNC e 5VDC

170

215

275

m

A

Current for SYNC

IOUT-AVE

VOUT Maximum Average

SYNC e 5VPP

100

mA

Load Current from (see Note 2)

RON

On Resistance

IL e 150 mA

09

15

X

N-Channel

TA e 27 C

RON

On Resistance

IL e 150 mA

07

12

X

P-Channel

TA e 27 C

RON

On Resistance

IL e 150 mA

018

06

X

Matching

TA e 27 C

Is

Supply Current

No SYNC

200

355

950

m

A

from P5V

3

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