THC63LVDM87_15 datasheet(2/13 Pages) THINE

Part #	THC63LVDM87

Description	LOW POWER / SMALL PACKAGE / 24Bit COLOR LVDS TRANSMITTER

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Manufacturer	THINE [THine Electronics, Inc.]

Direct Link	http://www.thine.co.jp/index_e.html

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THC63LVDM87_Rev.1.00_E

1/12

THine Electronics, Inc.

Block Diagram

7

THC63LVDM87

LOW POWER / SMALL PACKAGE / 24Bit COLOR LVDS TRANSMITTER

General Description

The THC63LVDM87 transmitter is designed to support

pixel data transmission between Host and Flat Panel

Display up to 1080p/WUXGA resolutions.

The THC63LVDM87 converts 28bits of CMOS/TTL

data into LVDS(Low Voltage Differential Signaling)

data stream. The transmitter can be programmed for ris-

ing edge or falling edge clocks through a dedicated pin.

At a transmit clock frequency of 160MHz, 24bits of

RGB data and 4b its of timin g and co ntrol d ata

(HSYNC, VSYNC, DE, CONT1) are transmitted at an

effective rate of 1120Mbps per LVDS channel.

Features

• Low power 1.8V CMOS design

• 5mm x 5mm/49pin/0.65mm pitch VFBGA Package

applicable to non-HDI PCB

• Wide dot clock range, 8-160MHz suited for

TV Signal: NTSC(12.27MHz) - 1080p(148.5MHz)

PC Signal: QVGA(8MHz) - WUXGA(154MHz)

• Supports 1.8V single power supply

• 1.8V/2.5V/3.3V CMOS inputs are supported by

setting IOVCC=1.8V/2.5V/3.3V

• LVDS swing is reducible by RS-pin to reduce EMI

and power consumption

• PLL requires no external components

• Supports spread spectrum clock generator

• On chip jitter filtering

• Power down mode

• Input clock triggering edge is selectable by R/F-pin

PLL

TA +/-

TB +/-

TC +/-

TD +/-

TCLK +/-

R/F

/PDWN

TA0-6

TC0-6

TD0-6

TRANSMITTER

(8 to 160MHz)

TTL

/CMOS

7

RS

7

TB0-6

7

Inputs

CLOCK

(LVDS)

8-160MHz

LVDS

Outputs

(56-1120Mbit/On Each

LVDS Channel)

CLKIN

THC63LVDM87

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THC63LVDM87 Datasheet(PDF) 2 Page - THine Electronics, Inc.

THC63LVDM87 Datasheet(HTML) 2 Page - THine Electronics, Inc.

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