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LM9071S Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM9071S
Description  Low-Dropout System Voltage Regulator with Delayed Reset
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM9071S Datasheet(HTML) 2 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
DC Input Voltage
−26V to +26V
Positive Input Transient (t<100 ms)
60V
Negative Input Transient (t<1 ms)
−50V
Reset Output Sink Current
5 mA
Power Dissipation
Internally Limited
Junction Temperature
150˚C
ESD Susceptibility (Note 2)
12 kV, 2 kV
Lead Temperature
(Soldering, 10 seconds)
260˚C
Storage Temperature
−50˚C to +150˚C
Operating Ratings (Note 1)
Input Voltage
6V to 26V
Ambient Temperature
−40˚C to +125˚C
θjc, TO-220, TO-263 Packages
3˚C/W
θja, TO-220, TO-263 Packages
43˚C/W
Electrical Characteristics
The following specifications apply for V
CC= 6V to 26V, −40˚C ≤ TA≤+125˚C, unless otherwise specified. COUT= 47 µFd with
an ESR < 3
Ω.C
IN=1 µFd.
Symbol
Parameter
Conditions
Min
Max
Units
REGULATOR OUTPUT
V
OUT
Output Voltage
5 mA
≤ I
OUT ≤ 250 mA
4.85
5.15
V
∆V
OUT Line
Line Regulation
I
OUT = 5 mA, 9V ≤ VIN ≤ 16.5V
25
mV
I
OUT = 250 mA
50
mV
∆V
OUT Load
Load Regulation
V
IN = 14.4V, 5 mA ≤ IOUT ≤ 250 mA
60
mV
Iq
Quiescent Current
I
OUT = 5mA
4
mA
I
OUT = 250 mA, VIN ≥ 8V
25
mA
I
OUT = 5 mA, VIN = 5V
10
mA
I
OUT = 250 mA, VIN = 6V
50
mA
Vdo
Dropout Voltage
I
OUT = 5 mA
300
mV
I
OUT = 250 mA
800
mV
Isc
Short Circuit Current
R
L = 1Ω
0.35
1.5
A
RR
Ripple Rejection
F
ripple = 120 Hz, Vripple = 1 Vrms
I
OUT = 50 mA
60
dB
OVthr
Overvoltage Shutdown
Threshold
27
V
V
O Transient
V
OUT during Transients
V
IN Peak ≤ 60V, RL = 100Ω, τ = 100 ms
7
V
RESET OUTPUT
Vth
Threshold Voltage
∆V
OUT Required to Generate a Reset
Output
4.8V
≤ V
OUT ≤ 5.2V
−300
−500
mV
Vlow
Reset Output Low Voltage
Isink = 1.6 mA, V
OUT > 3.2V
0.4
V
1.4V
≤ V
OUT ≤ 3.2V
0.8
V
Vhigh
Reset Output High Voltage
0.8
V
OUT
V
t
delay
Delay Time
Cdelay = 100 mFd
7.6
35
ms
Idelay
Charging Current for Cdelay
10
30
µA
Rpu
Internal Pull-up Resistance
12
80
k
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics.
Note 2: All pins will survive an ESD impulse of ±2000V using the human body model of 100 pF discharged through a 1.5 k
Ω resistor. In addition the input voltage
pin will withstand ten pulses of ±12 kV from a 150 pF capacitor discharged through a 560
Ω resistor when bypassed with a 22 nF, 100V capacitor.
www.national.com
2


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