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MC9328MX21CVM Datasheet(PDF) 54 Page - Motorola, Inc |
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MC9328MX21CVM Datasheet(HTML) 54 Page - Motorola, Inc |
54 / 106 page MC9328MX21 Product Preview, Rev. 1.1 54 Freescale Semiconductor Specifications Figure 44. SSI Transmitter External Clock Timing Diagram Figure 45. SSI Receiver External Clock Timing Diagram Table 32. SSI to SAP Ports Timing Parameter Table Ref No. Parameter 1.8V +/- 0.10V 3.0V +/- 0.30V Unit Minimum Maximum Minimum Maximum Internal Clock Operation1 (SAP Ports) 1 (Tx/Rx) CK clock period1 90.91 – 90.91 – ns 2 (Tx) CK high to FS (bl) high -3.30 -1.16 -2.98 -1.10 ns 3 (Rx) CK high to FS (bl) high -3.93 -1.34 -4.18 -1.43 ns CK Input 16 FS (bl) Input FS (wl) Input 17 18 22 24 26 STXD Output SRXD Input 27 28 34 Note: SRXD Input in Synchronous mode only 33 20 15 CK Input 16 FS (bl) Input FS (wl) Input 17 19 23 SRXD Input 29 30 21 25 15 |
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