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MC33888 Datasheet(PDF) 20 Page - Motorola, Inc

Part # MC33888
Description  Quad High-Side and Octal Low-Side Switch for Automotive
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC33888 Datasheet(HTML) 20 Page - Motorola, Inc

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33888
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
20
Figure 4. Single 16-Bit Word SPI Communication
Figure 5. Multiple 16-Bit Word SPI Communication
Serial Input Communication
SPI communication is accomplished using 16-bit messages.
A message is transmitted by the MCU starting with the MSB,
D15, and ending with the LSB, D0 (refer to Table 2, page 21).
Each incoming command message on the SI terminal can be
interpreted using the following bit assignments: the first twelve
LSBs, D11:D0, control each of the twelve outputs; the next
three bits, D14:D12, determine the command mode; and the
MSB, D15, is the watchdog bit.
Multiple messages can be transmitted in succession to
accommodate those applications where daisy chaining is
desirable or to confirm transmitted data, as long as the
messages are all multiples of 16 bits. Any attempt made to latch
in a message that is not 16 bits will be ignored.
The 33888 has six registers that are used to configure the
device and control the state of the four high-side and eight
low-side outputs (Table 3, page 21). The registers are
addressed via D14:D12 of the incoming SPI word (Table 2,
page 21).
CSB
SI
SCLK
D15
D1
D2
D3
D4
D5
D6
D7
D8
D9
D14
D13
D12
D11
D10
OD12
D0
OD13
OD14
OD15
OD6
OD7
OD8
OD9
OD10
OD11
OD1
OD2
OD3
OD4
OD5
OD0
SO
1. RST is in a logic [1] state during the above operation.
2. D15:D0 relate to the most recent ordered entry of program data into the 33888.
3. OD15:OD0 relate to the first 16 bits of ordered fault and status data out of the 33888.
Notes
CS
CSB
SI
SCLK
D15
D1*
D2*
D13*
D14*
D15*
D0
D1
D14
D13
D2
D0*
OD13
OD14
OD15
D14
D15
OD0
OD1
OD2
D1
D2
D13
D0
SO
1. RST is a logic [1] state during the above operation.
2. D15:D0 relate to the most recent ordered entry of program data into the 33888.
3. D15*:D0* relate to the first 16 bits of ordered entry data out of the 33888.
Notes
4. OD15:OD0 relate to the first 16 bits of ordered fault and status data out of the 33888.
CS
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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