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MC33742 Datasheet(PDF) 42 Page - Motorola, Inc

Part # MC33742
Description  System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC33742 Datasheet(HTML) 42 Page - Motorola, Inc

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33742
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
42
Wake-Up Register (WUR)
Tables 22 through 24 contain various Wake-Up Register
information. Local wake-up inputs L0:L3 can be used in both
Normal and Standby modes as port expander, as well as for
waking up the 33742 from Sleep or Stop modes (Table 22).
Wake-up inputs can be configured by pair. L0 and L1 can be
configured together, and L2 and L3 can be configured together
(Table 23).
——————————————————
Table 22. Wake-Up Register
WUR
R/W
D3
D2
D1
D0
$100b
W
LCTR3
LCTR2
LCTR1
LCTR0
R
L3WU
L2WU
L1WU
L0WU
Reset
Value
0
000
Reset
Condition
(Write)
(Note 58)
POR, NR2R, N2R, STB2R, STO2R
Notes
58.
See Table 8, page 38, for definitions of reset conditions.
Table 23. Wake-Up Register Control Bits
LCTR3 LCTR2 LCTR1 LCTR0
L0:L1 Config
L2:L3 Config
x
x
0
0
Inputs Disabled
xx
0
1
High Level
Sensitive
xx
1
0
Low Level
Sensitive
xx
1
1
Both Level
Sensitive
00
x
x
Inputs Disabled
01
x
x
High Level
Sensitive
10
x
x
Low Level
Sensitive
11
x
x
Both Level
Sensitive
x = Don’t care.
Table 24. Wake-Up Register Status Bits (Note 59)
Name
Value
Description
L3WU
0 or 1
If bit = 1, wake-up occurred from Sleep
or Stop modes; if bit = 0, no wake-up
has occurred.
When device is in Normal or Standby
mode, bit reports the State on Lx
terminal (LOW or HIGH) (0 = Lx LOW,
1= Lx HIGH)
L2WU
0 or 1
L1WU
0 or 1
L0WU
0 or 1
Notes
59.
WUR status bits have two functions. After 33742 wake-up,
they indicate the wake up source; for example, L2WU set at 1
if wake-up source is L2 input. After 33742 wake-up and once
the WUR register has been read, status bits indicate the real-
time state of the Lx inputs (1 = Lx is above threshold, 0 = Lx
input is below threshold). If after a wake-up from Lx input a
watchdog timeout occurs before the first reading of the WUR
register, the LxWU bits are reset. This can occur only if the
33742 was in Stop Mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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