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MB90548GSPF Datasheet(PDF) 29 Page - Fujitsu Component Limited. |
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MB90548GSPF Datasheet(HTML) 29 Page - Fujitsu Component Limited. |
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29 / 67 page  MB90540/540G/545/545G Series 29 s s s s CAN CONTROLLER The MB90540 series contains two CAN controllers (CAN0 and CAN1) , the MB90545 series contains only one (CAN0) . The Evaluation Chip MB90V540 also has two CAN controllers. The CAN controller has the following features : • Conforms to CAN Specification Version 2.0 Part A and B - Supports transmission/reception in standard frame and extended frame formats • Supports transmission of data frames by receiving remote frames • 16 transmitting/receiving message buffers - 29-bit ID and 8-byte data - Multi-level message buffer configuration • Provides full-bit comparison, full-bit mask, acceptance register 0/acceptance register 1 for each message buffer as ID acceptance mask - Two acceptance mask registers in either standard frame format or extended frame formats • Bit rate programmable from 10 Kbps to 1 Mbps (when input clock is at 16 MHz) List of Control Registers (Continued) Address Register Abbreviation Access Initial Value CAN0 CAN1 000070H 000080H Message buffer valid register BVALR R/W 00000000 00000000B 000071H 000081H 000072H 000082H Transmit request register TREQR R/W 00000000 00000000B 000073H 000083H 000074H 000084H Transmit cancel register TCANR W 00000000 00000000B 000075H 000085H 000076H 000086H Transmit complete register TCR R/W 00000000 00000000B 000077H 000087H 000078H 000088H Receive complete register RCR R/W 00000000 00000000B 000079H 000089H 00007AH 00008AH Remote request receiving register RRTRR R/W 00000000 00000000B 00007BH 00008BH 00007CH 00008CH Receive overrun register ROVRR R/W 00000000 00000000B 00007DH 00008DH 00007EH 00008EH Receive interrupt enable register RIER R/W 00000000 00000000B 00007FH 00008FH |
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