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MB90548GSPF Datasheet(PDF) 25 Page - Fujitsu Component Limited. |
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MB90548GSPF Datasheet(HTML) 25 Page - Fujitsu Component Limited. |
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25 / 67 page  MB90540/540G/545/545G Series 25 (Continued) Address Register Abbreviation Access Resource name Initial value 47H to 4BH Prohibited 4CH Input capture control status register 0/1 ICS01 R/W Input Capture 0/1 0 0 0 0 0 0 0 0B 4DH Input capture control status register 2/3 ICS23 R/W Input Capture 2/3 0 0 0 0 0 0 0 0B 4EH Input capture control status register 4/5 ICS45 R/W Input Capture 4/5 0 0 0 0 0 0 0 0B 4FH Input capture control status register 6/7 ICS67 R/W Input Capture 6/7 0 0 0 0 0 0 0 0B 50H Timer control status register 0 TMCSR0 R/W 16-bit Reload Timer 0 0 0 0 0 0 0 0 0B 51H Timer control status register 0 TMCSR0 R/W _ _ _ _ 0 0 0 0B 52H Timer register 0/reload register 0 TMR0/ TMRLR0 R/W XXXXXXXXB 53H Timer register 0/reload register 0 TMR0/ TMRLR0 R/W XXXXXXXXB 54H Timer control status register 1 TMCSR1 R/W 16-bit Reload Timer 1 0 0 0 0 0 0 0 0B 55H Timer control status register 1 TMCSR1 R/W _ _ _ _ 0 0 0 0B 56H Timer register 1/reload register 1 TMR1/ TMRLR1 R/W XXXXXXXXB 57H Timer register 1/reload register 1 TMR1/ TMRLR1 R/W XXXXXXXXB 58H Output compare control status register 0 OCS0 R/W Output Compare 0/1 0 0 0 0 _ _ 0 0B 59H Output compare control status register 1 OCS1 R/W _ _ _0 0 0 0 0B 5AH Output compare control status register 2 OCS2 R/W Output Compare 2/3 0 0 0 0 _ _ 0 0B 5BH Output compare control status register 3 OCS3 R/W _ _ _ 0 0 0 0 0B 5CH to 6BH Prohibited 6CH Timer Data register TCDT R/W I/O Timer 0 0 0 0 0 0 0 0B 6DH Timer Data register TCDT R/W 0 0 0 0 0 0 0 0B 6EH Timer Control register TCCS R/W 0 0 0 0 0 0 0 0B 6FH ROM mirror function selection register ROMM R/W ROM Mirror _ _ _ _ _ _ _ 1B 70H to 7FH Reserved for CAN 0 Interface. 80H to 8FH Reserved for CAN 1 Interface. 90H to 9DH Prohibited 9EH Program address detection control status register PACSR R/W Address Match Detection Function 0 0 0 0 0 0 0 0B 9FH Delayed interrupt/release register DIRR R/W Delayed Interrupt _ _ _ _ _ _ _ 0B A0H Low-power mode control register LPMCR R/W Low Power Controller 0 0 0 1 1 0 0 0B A1H Clock selection register CKSCR R/W Low Power Controller 1 1 1 1 1 1 0 0B |
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